1CPUPOWER-MONITOR(1) cpupower Manual CPUPOWER-MONITOR(1)
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6 cpupower-monitor - Report processor frequency and idle statistics
7
9 cpupower monitor -l
10 cpupower monitor [-c][-m <mon1>,[<mon2>,...]] [-i seconds]
12 cpupower monitor [-c][-m <mon1>,[<mon2>,...]] command
13
15 cpupower-monitor reports processor topology, frequency and idle power
16 state statistics. Either command is forked and statistics are printed
17 upon its completion, or statistics are printed periodically.
18 cpupower-monitor implements independent processor sleep state and fre‐
20 quency counters. Some are retrieved from kernel statistics, some are
21 directly reading out hardware registers. Use -l to get an overview
22 which are supported on your system.
23
26 -l
27 List available monitors on your system. Additional details about
28 each monitor are shown:
29 · The name in quotation marks which can be passed to the -m
31 parameter.
32 · The number of different counters the monitor supports in
34 brackets.
35 · The amount of time in seconds the counters might overflow,
37 due to implementation constraints.
38 · The name and a description of each counter and its proces‐
40 sor hierarchy level coverage in square brackets:
41 · [T] -> Thread
43 · [C] -> Core
45 · [P] -> Processor Package (Socket)
47 · [M] -> Machine/Platform wide counter
49 -m <mon1>,<mon2>,...
51 Only display specific monitors. Use the monitor string(s) provided
52 by -l option.
53 -i seconds
55 Measure intervall.
56 -c
58 Schedule the process on every core before starting and ending mea‐
59 suring. This could be needed for the Idle_Stats monitor when no
60 other MSR based monitor (has to be run on the core that is mea‐
61 sured) is run in parallel. This is to wake up the processors from
62 deeper sleep states and let the kernel re -account its cpuidle (C-
63 state) information before reading the cpuidle timings from sysfs.
64 command
66 Measure idle and frequency characteristics of an arbitrary com‐
67 mand/workload. The executable command is forked and upon its exit,
68 statistics gathered since it was forked are displayed.
69 -v
71 Increase verbosity if the binary was compiled with the DEBUG option
72 set.
73
76 Idle_Stats
77 Shows statistics of the cpuidle kernel subsystem. Values are retrieved
78 from /sys/devices/system/cpu/cpu*/cpuidle/state*/. The kernel updates
79 these values every time an idle state is entered or left. Therefore
80 there can be some inaccuracy when cores are in an idle state for some
81 time when the measure starts or ends. In worst case it can happen that
82 one core stayed in an idle state for the whole measure time and the
83 idle state usage time as exported by the kernel did not get updated. In
84 this case a state residency of 0 percent is shown while it was 100.
85 Mperf
88 The name comes from the aperf/mperf (average and maximum) MSR registers
89 used which are available on recent X86 processors. It shows the average
90 frequency (including boost frequencies). The fact that on all recent
91 hardware the mperf timer stops ticking in any idle state it is also
92 used to show C0 (processor is active) and Cx (processor is in any sleep
93 state) times. These counters do not have the inaccuracy restrictions
94 the "Idle_Stats" counters may show. May work poorly on Linux-2.6.20
95 through 2.6.29, as the acpi-cpufreq kernel frequency driver periodi‐
96 cally cleared aperf/mperf registers in those kernels.
97 Nehalem SandyBridge HaswellExtended
100 Intel Core and Package sleep state counters. Threads (hyperthreaded
101 cores) may not be able to enter deeper core states if its sibling is
102 utilized. Deepest package sleep states may in reality show up as
103 machine/platform wide sleep states and can only be entered if all cores
104 are idle. Look up Intel manuals (some are provided in the References
105 section) for further details. The monitors are named after the CPU
106 family where the sleep state capabilities got introduced and may not
107 match exactly the CPU name of the platform. For example an IvyBridge
108 processor has sleep state capabilities which got introduced in Nehalem
109 and SandyBridge processor families. Thus on an IvyBridge processor one
110 will get Nehalem and SandyBridge sleep state monitors. HaswellExtended
111 extra package sleep state capabilities are available only in a specific
112 Haswell (family 0x45) and probably also other future processors.
113 Fam_12h Fam_14h
116 AMD laptop and desktop processor (family 12h and 14h) sleep state coun‐
117 ters. The registers are accessed via PCI and therefore can still be
118 read out while cores have been offlined.
119 There is one special counter: NBP1 (North Bridge P1). This one always
121 returns 0 or 1, depending on whether the North Bridge P1 power state
122 got entered at least once during measure time. Being able to enter
123 NBP1 state also depends on graphics power management. Therefore this
124 counter can be used to verify whether the graphics' driver power man‐
125 agement is working as expected.
126
129 cpupower monitor -l" may show:
130 Monitor "Mperf" (3 states) - Might overflow after 922000000 s
131 ...
133 Monitor "Idle_Stats" (3 states) - Might overflow after 4294967295 s
135 ...
137 cpupower monitor -m "Idle_Stats,Mperf" scp /tmp/test /nfs/tmp
139 Monitor the scp command, show both Mperf and Idle_Stats states counter
141 statistics, but in exchanged order.
142 Be careful that the typical command to fully utilize one CPU by doing:
146 cpupower monitor cat /dev/zero >/dev/null
148 Does not work as expected, because the measured output is redirected to
150 /dev/null. This could get workarounded by putting the line into an own,
151 tiny shell script. Hit CTRL-c to terminate the command and get the mea‐
152 sure output displayed.
153
156 "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Proces‐
157 sors" http://support.amd.com/us/Processor_TechDocs/43170.pdf
158 "Intel® Turbo Boost Technology in Intel® Core™ Microarchitecture
160 (Nehalem) Based Processors" http://download.intel.com/design/proces‐
161 sor/applnots/320354.pdf
162 "Intel® 64 and IA-32 Architectures Software Developer's Manual Volume
164 3B: System Programming Guide" http://www.intel.com/products/proces‐
165 sor/manuals
166
169 /dev/cpu/*/msr
170 /sys/devices/system/cpu/cpu*/cpuidle/state*/.
171
174 powertop(8), msr(4), vmstat(8)
175
177 Written by Thomas Renninger <trenn@suse.de>
178 Nehalem, SandyBridge monitors and command passing
180 based on turbostat.8 from Len Brown <len.brown@intel.com>
181 22/02/2011 CPUPOWER-MONITOR(1)