1xentrace(8)                           Xen                          xentrace(8)
2
3
4

NAME

6       xentrace - capture Xen trace buffer data
7

SYNOPSIS

9       xentrace [ OPTIONS ] [ FILE ]
10

DESCRIPTION

12       xentrace is used to capture trace buffer data from Xen.  The data is
13       output in the following binary format (host endian):
14
15           CPU(uint) TSC(u64) EVENT(u32) D1 D2 D3 D4 D5 (all u32)
16
17       Where CPU is the processor number, TSC is the record's timestamp (the
18       value of the CPU cycle counter), EVENT is the event ID and D1...D5 are
19       the trace data.
20
21       Data is dumped onto the standard output (which must not be a TTY) or a
22       FILE specified on the command line.
23
24       The output should be parsed using the tool xentrace_format, which can
25       produce human-readable output in ASCII format.
26

OPTIONS

28       -t l, --log-thresh=l
29           set the threshold number, l, of new records required to trigger a
30           write of all new records to the output
31
32       -s p, --poll-sleep=p
33           set the time, p, (in milliseconds) to sleep between polling the
34           buffers for new data.
35
36       -c [c|CPU-LIST|all], --cpu-mask=[c|CPU-LIST|all]
37           This can be: a hex value (of the form 0xNNNN...), or a set of cpu
38           ranges as described below, or the string all. Hex values are
39           limited to 32 bits. If not specified, the cpu-mask as set during
40           bootup will be constructed. If using the CPU-LIST it expects
41           decimal numbers, which may be specified as follows:
42
43             "0-3"
44                 Trace only on CPUs 0 through 3
45
46             "0,2,5-7"
47                 Trace only on CPUs 0, 2, and 5 through 7
48
49             "-3"
50                 Trace only on CPUs 0 through 3
51
52             "-3,7"
53                 Trace only on CPUs 0 through 3 and 7
54
55             "3-"
56                 Trace only on CPUs 3 up to maximum numbers of CPUs the host has
57
58           If using all it will use all of the CPUs the host has.
59
60       -e mask, --evt-mask=mask
61           set event capture mask. If not specified the TRC_ALL will be used.
62
63       -?, --help
64           Give this help list
65
66       --usage
67           Give a short usage message
68
69       -V, --version
70           Print program version
71
72   Event Classes (Masks)
73       The following event classes (masks) can be used to filter the events
74       being gathered by xentrace:
75
76               ID                  Description
77
78               0x0001f000          TRC_GEN
79               0x0002f000          TRC_SCHED
80               0x0004f000          TRC_DOM0OP
81               0x0008f000          TRC_HVM
82               0x0010f000          TRC_MEM
83               0xfffff000          TRC_ALL
84
85   Event Subclasses (More Masks)
86       The following event subclasses (masks) can also be used to filter the
87       events being gathered by xentrace:
88
89               ID                  Description
90
91               0x00081000          TRC_HVM_ENTRYEXIT
92               0x00082000          TRC_HVM_HANDLER
93
94   Events
95       xentrace collects the following events from the trace buffer:
96
97               ID                 Description
98
99               0x0001f001         TRC_LOST_RECORDS
100               0x0002f001         TRC_SCHED_DOM_ADD
101               0x0002f002         TRC_SCHED_DOM_REM
102               0x0002f003         TRC_SCHED_SLEEP
103               0x0002f004         TRC_SCHED_WAKE
104               0x0002f005         TRC_SCHED_YIELD
105               0x0002f006         TRC_SCHED_BLOCK
106               0x0002f007         TRC_SCHED_SHUTDOWN
107               0x0002f008         TRC_SCHED_CTL
108               0x0002f009         TRC_SCHED_ADJDOM
109               0x0002f010         TRC_SCHED_SWITCH
110               0x0002f011         TRC_SCHED_S_TIMER_FN
111               0x0002f012         TRC_SCHED_T_TIMER_FN
112               0x0002f013         TRC_SCHED_DOM_TIMER_FN
113               0x0002f014         TRC_SCHED_SWITCH_INFPREV
114               0x0002f015         TRC_SCHED_SWITCH_INFNEXT
115
116               0x00081001         TRC_HVM_VMENTRY
117               0x00081002         TRC_HVM_VMEXIT
118               0x00082001         TRC_HVM_PF_XEN
119               0x00082002         TRC_HVM_PF_INJECT
120               0x00082003         TRC_HVM_INJ_EXC
121               0x00082004         TRC_HVM_INJ_VIRQ
122               0x00082005         TRC_HVM_REINJ_VIRQ
123               0x00082006         TRC_HVM_IO_READ
124               0x00082007         TRC_HVM_IO_WRITE
125               0x00082008         TRC_HVM_CR_READ
126               0x00082009         TRC_HVM_CR_WRITE
127               0x0008200A         TRC_HVM_DR_READ
128               0x0008200B         TRC_HVM_DR_WRITE
129               0x0008200C         TRC_HVM_MSR_READ
130               0x0008200D         TRC_HVM_MSR_WRITE
131               0x0008200E         TRC_HVM_CPUID
132               0x0008200F         TRC_HVM_INTR
133               0x00082010         TRC_HVM_NMI
134               0x00082011         TRC_HVM_SMI
135               0x00082012         TRC_HVM_VMMCALL
136               0x00082013         TRC_HVM_HLT
137               0x00082014         TRC_HVM_INVLPG
138
139               0x0010f001         TRC_MEM_PAGE_GRANT_MAP
140               0x0010f002         TRC_MEM_PAGE_GRANT_UNMAP
141               0x0010f003         TRC_MEM_PAGE_GRANT_TRANSFER
142

AUTHOR

144       Mark A. Williamson <mark.a.williamson@intel.com>
145

SEE ALSO

147       xentrace_format(1)
148
149
150
1514.12.1                            2019-12-11                       xentrace(8)
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