1IPMCTL-SHOW-MEMORY-RESOURCES(1) ipmctl IPMCTL-SHOW-MEMORY-RESOURCES(1)
2
6 ipmctl-show-memory-resources - Shows PMem module and DDR memory
7 allocation
8
10 ipmctl show [OPTIONS] -memoryresources
11
13 Shows PMem module and DDR memory allocation information for this
14 platform.
15
17 -h, -help
18 Displays help for the command.
19 -ddrt
21 Used to specify DDRT as the desired transport protocol for the
22 current invocation of ipmctl.
23 -smbus
25 Used to specify SMBUS as the desired transport protocol for the
26 current invocation of ipmctl.
27 Note
29 The -ddrt and -smbus options are mutually exclusive and may not be
30 used together.
31 -o (text|nvmxml), -output (text|nvmxml)
33 Changes the output format. One of: "text" (default) or "nvmxml".
34 -u (B|MB|MiB|GB|GiB|TB| TiB), -units (B|MB|MiB|GB|GiB|TB| TiB)
36 Changes the units that capacities are displayed in for this
37 command. One of: bytes (B), megabytes (MB), mebibytes (MiB),
38 gigabytes (GB), gibibytes (GiB), terabytes (TB) or tebibytes (TiB).
39
41 Shows the PMem module and DDR memory allocation.
42 ipmctl show -memoryresources
44
46 In order to successfully execute this command:
47 · The caller must have the appropriate privileges.
49 · The specified PMem modules must be manageable by the host software.
51
53 Returns a table containing the attributes listed below.
54 Note
56 Capacities from unmanageable PMem modules are not included in the
57 following aggregated totals.
58 Volatile DDR Capacity
60 Total DDR capacity that is used as volatile memory.
61 Volatile PMem module Capacity
63 Total PMem module capacity that is used as volatile memory.
64 Total Volatile Capacity
66 Total DDR and PMem module capacity that is used as volatile memory.
67 AppDirect PMem module Capacity
69 Total PMem module capacity used as persistent memory.
70 Total AppDirect Capacity
72 Total DDR and PMem module capacity used as persistent memory.
73 Cache DDR Capacity
75 Total DDR capacity used as a cache for PMem modules.
76 Total Cache Capacity
78 Total DDR capacity used as a cache for PMem modules.
79 Inaccessible DDR Capacity
81 Total DDR capacity that is inaccessible.
82 Inaccessible PMem module Capacity
84 Total PMem module capacity that is inaccessible due to any of:
85 · Platform configuration prevents accessing this capacity. For
87 example, MemoryCapacity is configured but MemoryMode is not
88 enabled by platform FW (current Memory Mode is 1LM).
89 · Capacity is inaccessible because it is not mapped into the
91 System Physical Address space (SPA). This is usually due to
92 platform firmware memory alignment requirements.
93 · Persistent capacity that is reserved. This capacity is the
95 persistent memory partition capacity (rounded down for
96 alignment) less any App Direct capacity. Reserved capacity
97 typically results from a Memory Allocation Goal request that
98 specified the Reserved property. This capacity is not mapped to
99 System Physical Address space (SPA).
100 · Capacity that is unusable because it has not been configured.
102 · PMem module configured capacity but SKU prevents usage. For
104 example, AppDirectCapacity but PMem module SKU is MemoryMode
105 only.
106 Total Inaccessible Capacity
108 Total capacity of DDR and PMem module that is inaccessible.
109 Physical DDR Capacity
111 Total physical DDR capacity populated on the platform.
112 Physical PMem module Capacity
114 Total physical PMem module capacity populated on the platform.
115 Total Physical Capacity
117 Total physical capacity populated on the platform.
118
120 PMem modules are partitioned into Memory and Persistent partitions.
121 Memory partitions are aligned on a 1 GiB boundary by ipmctl with the
122 Persistent partition consuming the remaining capacity. Any capacity
123 that falls outside the Memory and Persistent partitions is
124 InaccessibleCapacity and is not useable. If the PMem module is
125 configured for 100% Memory Mode, then the Memory partition consumes all
126 of the capacity and the Persistent partition has none.
127 The mode determines how the DDR capacities are allocated. In 1LM and
129 AppDirect, all DDR capacity is used as additional volatile memory. In
130 MemoryMode, all DDR capacity that the CPU will support is used as a
131 cache for the PMem module.
132 Platform firmware alignment restrictions may result in some capacity
134 from the Memory and Persistent partitions not mapped to System Physical
135 Address space (SPA). This memory is considered InaccessibleCapacity and
136 is not usable.
137 The definitions and calculations that follow intend to describe how
139 each of the values are determined.
140 Definitions:
142 Intel PMem module Current Config
144 See the Intel® Optane™ Persistent Memory Software-Firmware
145 Interface Specification for details.
146 PMem module Partition Info
148 PMem module partition information provided by PMem module firmware.
149 See the Intel® Optane™ Persistent Memory Module Firmware Interface
150 Specification for details.
151 PMem module Physical Capacity (PC)
153 Raw capacity (total usable) reported by PMem module Partition Info
154 PMem module Memory Partition Capacity (MPC)
156 Volatile capacity reported by PMem module Partition Info
157 PMem module Persistent Partition Capacity (PPC)
159 Persistent capacity reported by PMem module Partition Info
160 PMem module Volatile Memory Capacity (VMC)
162 Usable volatile memory capacity as reported by platform FW via the
163 Intel PMem module Current Config→Volatile Memory Size Mapped into
164 SPA field
165 PMem module Persistent Memory Capacity (PMC)
167 Usable persistent memory capacity as reported by platform FW via
168 the Intel PMem module Current Config→Persistent Memory Size Mapped
169 into SPA field
170 DDR Total Capacity (DDRTC)
172 Total amount of memory available for use on the populated DDRs
173 Calculations:
175 if (CurrentMode == 1LM) then
177 DDRCacheCapacity = 0
178 DDRVolatileCapacity = DDRTC
179 else if (CurrentMode == 2LM) then
180 DDRCacheCapacity = DDRTC
181 DDRVolatileCapacity = 0
182 TotalVolatileCapacity = VMC + DDRVolatileCapacity
184 InaccessibleCapacity = PC - PMC
186 if (CurrentMode != 1LM) then
187 InaccessibleCapacity -= VMC (rounded down for alignment)
188ipmctl 2020-12-03 IPMCTL-SHOW-MEMORY-RESOURCES(1)