1SIM(5) File Formats Manual SIM(5)
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6 sim - format of .sim files read by esim, crystal, etc.
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10 The simulation tools crystal(1) and esim(1) accept a circuit descrip‐
11 tion in .sim format. There is a single .sim file for the entire cir‐
12 cuit, unlike Magic's ext(5) format in which there is a .ext file for
13 every cell in a hierarchical design.
14 A .sim file consists of a series of lines, each of which begins with a
16 key letter. The key letter beginning a line determines how the remain‐
17 der of the line is interpreted. The following are the list of key let‐
18 ters understood.
19 | units: s tech: tech format: MIT|LBL|SU
21 If present, this must be the first line in the .sim file. It
22 identifies the technology of this circuit as tech and gives a
23 scale factor for units of linear dimension as s. All linear
24 dimensions appearing in the .sim file are multiplied by s to
25 give centimicrons. The format field signifies the sim variant.
26 MIT and SU are compatible and understood by all tools. LBL is
27 understood only by gemini(1).
28 type g s d l w x y g=gattrs s=sattrs d=dattrs
30 Defines a transistor of type type. Currently, type may be e or
31 d for NMOS, or p or n for CMOS. The name of the node to which
32 the gate, source, and drain of the transistor are connected are
33 given by g, s, and d respectively. The length and width of the
34 transistor are l and w. The next two tokens, x and y, are
35 optional. If present, they give the location of a point inside
36 the gate region of the transistor. The last three tokens are
37 the attribute lists for the transistor gate, source, and drain.
38 If no attributes are present for a particular terminal, the cor‐
39 responding attribute list may be absent (i.e, there may be no g=
40 field at all). The attribute lists gattrs, etc. are comma-sepa‐
41 rated lists of labels. The label names should not include any
42 spaces, although some tools can accept label names with spaces
43 if they are enclosed in double quotes. In version 6.4.5 and
44 later the default format produced by ext2sim is SU. In this for‐
45 mat the attribute of the gate starting with S_ is the substrate
46 node of the fet. The attributes of the gate, and source and sub‐
47 strate starting with A_, P_ are the area and perimeter (summed
48 for that node only once) of the source and drain respectively.
49 This addition to the format is backwards compatible.
50 C n1 n2 cap
52 Defines a capacitor between nodes n1 and n2. The value of the
53 capacitor is cap femtofarads. NOTE: since many analysis tools
54 compute transistor gate capacitance themselves from the transis‐
55 tor's area and perimeter, the capacitance between a node and
56 substrate (GND!) normally does not include the capacitance from
57 transistor gates connected to that node. If the .sim file was
58 produced by ext2sim(1), check the technology file that was used
59 to produce the original .ext files to see whether transistor
60 gate capacitance is included or excluded; see ``Magic Main‐
61 tainer's Manual #2: The Technology File'' for details.
62 R node res
64 Defines the lumped resistance of node node to be res ohms. This
65 construct is only interpreted by a few programs.
66 r node1 node2 res
68 Defines an explicit resistor between nodes node1 and node2 of
69 resistance res ohms. This construct is only interpreted by a
70 few programs.
71 N node darea dperim parea pperim marea mperim
73 As an alternative to computed capacitances, some tools expect
74 the total perimeter and area of the polysilicon, diffusion, and
75 metal in each node to be reported in the .sim file. The N con‐
76 struct associates diffusion area darea (in square centimicrons)
77 and diffusion perimeter dperim (in centimicrons) with node node,
78 polysilicon area parea and perimeter pperim, and metal area
79 marea and perimeter mperim. This construct is technology depen‐
80 dent and obsolete.
81 A node attr
83 Associates attribute attr for node node. The string attr should
84 contain no blanks.
85 = node1 node2
87 Each node in a .sim file is named implicitly by having it appear
88 in a transistor definition. All node names appearing in a .sim
89 file are assumed to be distinct. Some tools, such as esim(1),
90 recognize aliases for node names. The = construct allows the
91 name node2 to be defined as an alias for the name node1.
92 Aliases defined by means of this construct may not appear any‐
93 where else in the .sim file.
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97 crystal(1), esim(1), ext2sim(1), sim2spice(1), ext(5)
984th Berkeley Distribution SIM(5)