1VERILATOR(1)          User Contributed Perl Documentation         VERILATOR(1)
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NAME

6       Verilator - Translate and simulate SystemVerilog code using C++/SystemC
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SYNOPSIS

9           verilator --help
10           verilator --version
11           verilator --binary -j 0 [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so]
12           verilator --cc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so]
13           verilator --sc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so]
14           verilator --lint-only -Wall [source_files.v]...
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DESCRIPTION

17       The "Verilator" package converts all synthesizable, and many
18       behavioral, Verilog and SystemVerilog designs into a C++ or SystemC
19       model that after compiling can be executed.  Verilator is not a
20       traditional simulator, but a compiler.
21
22       For documentation see <https://verilator.org/verilator_doc.html>.
23

ARGUMENT SUMMARY

25       This is a short summary of the arguments to the "verilator" executable.
26       See <https://verilator.org/guide/latest/exe_verilator.html> for the
27       detailed descriptions of these arguments.
28
29           <file.v>                    Verilog package, module, and top module filenames
30           <file.c/cc/cpp>             Optional C++ files to compile in
31           <file.a/o/so>               Optional C++ files to link in
32
33            +1364-1995ext+<ext>        Use Verilog 1995 with file extension <ext>
34            +1364-2001ext+<ext>        Use Verilog 2001 with file extension <ext>
35            +1364-2005ext+<ext>        Use Verilog 2005 with file extension <ext>
36            +1800-2005ext+<ext>        Use SystemVerilog 2005 with file extension <ext>
37            +1800-2009ext+<ext>        Use SystemVerilog 2009 with file extension <ext>
38            +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
39            +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
40           --assert                    Enable all assertions
41           --autoflush                 Flush streams after all $displays
42           --bbox-sys                  Blackbox unknown $system calls
43           --bbox-unsup                Blackbox unsupported language features
44           --binary                    Build model binary
45           --build                     Build model executable/library after Verilation
46           --build-dep-bin <filename>  Override build dependency Verilator binary
47           --build-jobs <jobs>         Parallelism for --build
48           --cc                        Create C++ output
49           --cdc                       Clock domain crossing analysis
50            -CFLAGS <flags>            C++ compiler arguments for makefile
51           --clk <signal-name>         Mark specified signal as clock
52           --no-clk <signal-name>      Prevent marking specified signal as clock
53           --compiler <compiler-name>  Tune for specified C++ compiler
54           --converge-limit <loops>    Tune convergence settle time
55           --coverage                  Enable all coverage
56           --coverage-line             Enable line coverage
57           --coverage-max-width <width>   Maximum array depth for coverage
58           --coverage-toggle           Enable toggle coverage
59           --coverage-underscore       Enable coverage of _signals
60           --coverage-user             Enable SVL user coverage
61            -D<var>[=<value>]          Set preprocessor define
62           --debug                     Enable debugging
63           --debug-check               Enable debugging assertions
64           --no-debug-leak             Disable leaking memory in --debug mode
65           --debugi <level>            Enable debugging at a specified level
66           --debugi-<srcfile> <level>  Enable debugging a source file at a level
67           --no-decoration             Disable comments and symbol decorations
68           --default-language <lang>   Default language to parse
69            +define+<var>=<value>      Set preprocessor define
70           --dpi-hdr-only              Only produce the DPI header file
71           --dump-defines              Show preprocessor defines with -E
72           --dump-dfg                  Enable dumping DfgGraphs to .dot files
73           --dump-graph                Enable dumping V3Graphs to .dot files
74           --dump-tree                 Enable dumping Ast .tree files
75           --dump-tree-addrids         Use short identifiers instead of addresses
76           --dump-<srcfile>            Enable dumping everything in source file
77           --dumpi-dfg <level>         Enable dumping DfgGraphs to .dot files at level
78           --dumpi-graph <level>       Enable dumping V3Graphs to .dot files at level
79           --dumpi-tree <level>        Enable dumping Ast .tree files at level
80           --dumpi-<srcfile> <level>   Enable dumping everything in source file at level
81            -E                         Preprocess, but do not compile
82           --error-limit <value>       Abort after this number of errors
83           --exe                       Link to create executable
84           --expand-limit <value>      Set expand optimization limit
85            -F <file>                  Parse arguments from a file, relatively
86            -f <file>                  Parse arguments from a file
87            -FI <file>                 Force include of a file
88           --flatten                   Force inlining of all modules, tasks and functions
89            -fno-<optimization>        Disable internal optimization stage
90            -G<name>=<value>           Overwrite top-level parameter
91           --gate-stmts <value>        Tune gate optimizer depth
92           --gdb                       Run Verilator under GDB interactively
93           --gdbbt                     Run Verilator under GDB for backtrace
94           --generate-key              Create random key for --protect-key
95           --getenv <var>              Get environment variable with defaults
96           --get-supported <feature>   Get if feature is supported
97           --help                      Display this help
98           --hierarchical              Enable hierarchical Verilation
99            -I<dir>                    Directory to search for includes
100           --if-depth <value>          Tune IFDEPTH warning
101            +incdir+<dir>              Directory to search for includes
102           --inline-mult <value>       Tune module inlining
103           --instr-count-dpi <value>   Assumed dynamic instruction count of DPI imports
104            -j <jobs>                  Parallelism for --build-jobs/--verilate-jobs
105           --l2-name <value>           Verilog scope name of the top module
106           --language <lang>           Default language standard to parse
107            -LDFLAGS <flags>           Linker pre-object arguments for makefile
108           --lib-create <name>         Create a DPI library
109            +libext+<ext>+[ext]...     Extensions for finding modules
110           --lint-only                 Lint, but do not make output
111           --make <build-tool>         Generate scripts for specified build tool
112            -MAKEFLAGS <flags>         Arguments to pass to make during --build
113           --main                      Generate C++ main() file
114           --main-top-name             Specify top name passed to Verilated model in generated C++ main
115           --max-num-width <value>     Maximum number width (default: 64K)
116           --Mdir <directory>          Name of output object directory
117           --MMD                       Create .d dependency files
118           --mod-prefix <topname>      Name to prepend to lower classes
119           --MP                        Create phony dependency targets
120            +notimingchecks            Ignored
121            -O0                        Disable optimizations
122            -O3                        High-performance optimizations
123            -O<optimization-letter>    Selectable optimizations
124            -o <executable>            Name of final executable
125           --no-order-clock-delay      Disable ordering clock enable assignments
126           --output-split <statements>          Split .cpp files into pieces
127           --output-split-cfuncs <statements>   Split model functions
128           --output-split-ctrace <statements>   Split tracing functions
129            -P                         Disable line numbers and blanks with -E
130           --pins-bv <bits>            Specify types for top-level ports
131           --pins-sc-biguint           Specify types for top-level ports
132           --pins-sc-uint              Specify types for top-level ports
133           --pins-uint8                Specify types for top-level ports
134           --no-pins64                 Don't use uint64_t's for 33-64 bit sigs
135           --pipe-filter <command>     Filter all input through a script
136           --pp-comments               Show preprocessor comments with -E
137           --prefix <topname>          Name of top-level class
138           --private                   Debugging; see docs
139           --prof-c                    Compile C++ code with profiling
140           --prof-cfuncs               Name functions for profiling
141           --prof-exec                 Enable generating execution profile for gantt chart
142           --prof-pgo                  Enable generating profiling data for PGO
143           --protect-ids               Hash identifier names for obscurity
144           --protect-key <key>         Key for symbol protection
145           --protect-lib <name>        Create a DPI protected library
146           --public                    Debugging; see docs
147           --public-params             Mark all parameters as public_flat
148           --public-flat-rw            Mark all variables, etc as public_flat_rw
149            -pvalue+<name>=<value>     Overwrite toplevel parameter
150           --quiet-exit                Don't print the command on failure
151           --relative-includes         Resolve includes relative to current file
152           --reloop-limit              Minimum iterations for forming loops
153           --report-unoptflat          Extra diagnostics for UNOPTFLAT
154           --rr                        Run Verilator and record with rr
155           --savable                   Enable model save-restore
156           --sc                        Create SystemC output
157           --no-skip-identical         Disable skipping identical output
158           --stats                     Create statistics file
159           --stats-vars                Provide statistics on variables
160           --no-std                    Prevent parsing standard library
161           --structs-packed            Convert all unpacked structures to packed structures
162            -sv                        Enable SystemVerilog parsing
163            +systemverilogext+<ext>    Synonym for +1800-2017ext+<ext>
164           --threads <threads>         Enable multithreading
165           --threads-dpi <mode>        Enable multithreaded DPI
166           --threads-max-mtasks <mtasks>  Tune maximum mtask partitioning
167           --timing                    Enable timing support
168           --no-timing                 Disable timing support
169           --timescale <timescale>     Sets default timescale
170           --timescale-override <timescale>  Overrides all timescales
171           --top <topname>             Alias of --top-module
172           --top-module <topname>      Name of top-level input module
173           --trace                     Enable waveform creation
174           --trace-coverage            Enable tracing of coverage
175           --trace-depth <levels>      Depth of tracing
176           --trace-fst                 Enable FST waveform creation
177           --trace-max-array <depth>   Maximum bit width for tracing
178           --trace-max-width <width>   Maximum array depth for tracing
179           --trace-params              Enable tracing of parameters
180           --trace-structs             Enable tracing structure names
181           --trace-threads <threads>   Enable FST waveform creation on separate threads
182           --trace-underscore          Enable tracing of _signals
183            -U<var>                    Undefine preprocessor define
184           --no-unlimited-stack        Don't disable stack size limit
185           --unroll-count <loops>      Tune maximum loop iterations
186           --unroll-stmts <stmts>      Tune maximum loop body size
187           --unused-regexp <regexp>    Tune UNUSED lint signals
188            -V                         Verbose version and config
189            -v <filename>              Verilog library
190           --verilate-jobs             Job threads for Verilation stage
191           --no-verilate               Skip Verilation and just compile previously Verilated code
192            +verilog1995ext+<ext>      Synonym for +1364-1995ext+<ext>
193            +verilog2001ext+<ext>      Synonym for +1364-2001ext+<ext>
194           --version                   Displays program version and exits
195           --vpi                       Enable VPI compiles
196           --waiver-output <filename>  Create a waiver file based on the linter warnings
197            -Wall                      Enable all style warnings
198            -Werror-<message>          Convert warnings to errors
199            -Wfuture-<message>         Disable unknown message warnings
200            -Wno-<message>             Disable warning
201            -Wno-context               Disable source context on warnings
202            -Wno-fatal                 Disable fatal exit on warnings
203            -Wno-lint                  Disable all lint warnings
204            -Wno-style                 Disable all style warnings
205            -Wpedantic                 Warn on compliance-test issues
206            -Wwarn-<message>           Enable specified warning message
207            -Wwarn-lint                Enable lint warning message
208            -Wwarn-style               Enable style warning message
209           --x-assign <mode>           Assign non-initial Xs to this value
210           --x-initial <mode>          Assign initial Xs to this value
211           --x-initial-edge            Enable initial X->0 and X->1 edge triggers
212           --xml-only                  Create XML parser output
213           --xml-output                XML output filename
214            -y <dir>                   Directory to search for modules
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216       This is a short summary of the simulation runtime arguments, i.e. for
217       the final Verilated simulation runtime models.  See
218       <https://verilator.org/guide/latest/exe_verilator.html> for the
219       detailed description of these arguments.
220
221            +verilator+debug                  Enable debugging
222            +verilator+debugi+<value>         Enable debugging at a level
223            +verilator+error+limit+<value>    Set error limit
224            +verilator+help                   Display help
225            +verilator+noassert               Disable assert checking
226            +verilator+prof+exec+file+<filename>  Set execution profile filename
227            +verilator+prof+exec+start+<value>    Set execution profile starting point
228            +verilator+prof+exec+window+<value>   Set execution profile duration
229            +verilator+prof+vlt+file+<filename>   Set PGO profile filename
230            +verilator+rand+reset+<value>     Set random reset technique
231            +verilator+seed+<value>           Set random seed
232            +verilator+V                      Verbose version and config
233            +verilator+version                Show version and exit
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DISTRIBUTION

236       The latest version is available from <https://verilator.org>.
237
238       Copyright 2003-2023 by Wilson Snyder. This program is free software;
239       you can redistribute it and/or modify the Verilator internals under the
240       terms of either the GNU Lesser General Public License Version 3 or the
241       Perl Artistic License Version 2.0.
242
243       All Verilog and C++/SystemC code quoted within this documentation file
244       are released as Creative Commons Public Domain (CC0).  Many example
245       files and test files are likewise released under CC0 into effectively
246       the Public Domain as described in the files themselves.
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SEE ALSO

249       verilator_coverage, verilator_gantt, verilator_profcfunc, make,
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251       "verilator --help" which is the source for this document,
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253       and <https://verilator.org/verilator_doc.html> for detailed
254       documentation.
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258perl v5.38.0                      2023-09-09                      VERILATOR(1)
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