1LIBPFM(3) Linux Programmer's Manual LIBPFM(3)
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6 libpfm_intel_spr - support for Intel SapphireRapid core PMU
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9 #include <perfmon/pfmlib.h>
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11 PMU name: spr
12 PMU desc: Intel SapphireRapid
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16 The library supports the Intel SapphireRapid core PMU. It should be
17 noted that this PMU model only covers each core's PMU and not the
18 socket level PMU.
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20 On SapphireRapid, the number of generic counters depends on the Hyper‐
21 threading (HT) mode.
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23 The pfm_get_pmu_info() function returns the maximum number of generic
24 counters in num_cntrs.
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28 The following modifiers are supported on Intel SapphireRapid proces‐
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31 u Measure at user level which includes privilege levels 1, 2, 3.
32 This corresponds to PFM_PLM3. This is a boolean modifier.
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34 k Measure at kernel level which includes privilege level 0. This
35 corresponds to PFM_PLM0. This is a boolean modifier.
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37 i Invert the meaning of the event. The counter will now count cy‐
38 cles in which the event is not occurring. This is a boolean mod‐
39 ifier
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41 e Enable edge detection, i.e., count only when there is a state
42 transition from no occurrence of the event to at least one oc‐
43 currence. This modifier must be combined with a counter mask
44 modifier (m) with a value greater or equal to one. This is a
45 boolean modifier.
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47 c Set the counter mask value. The mask acts as a threshold. The
48 counter will count the number of cycles in which the number of
49 occurrences of the event is greater or equal to the threshold.
50 This is an integer modifier with values in the range [0:255].
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52 ldlat Pass a latency threshold to the MEM_TRANS_RETIRED:LOAD_LATENCY
53 event. This is an integer attribute that must be in the range
54 [1:65535]. It is required for this event. Note that the event
55 must be used with precise sampling (PEBS).
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57 intx Monitor the event only when executing inside a transactional
58 memory region (in tx). Event does not count otherwise. This is a
59 boolean modifiers. Default value is 0.
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61 intxcp Do not count occurrences of the event when they are inside an
62 aborted transactional memory region. This is a boolean modifier.
63 Default value is 0.
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65 fe_thres
66 This modifier is for the FRONTEND_RETIRED event only. It defines
67 the period in core cycles after which the IDQ_*_BUBBLES umask
68 counts. It acts as a threshold, i.e., at least a period of N
69 core cycles where the frontend did not deliver X uops. It can
70 only be used with the IDQ_*_BUBBLES umasks. If not specified,
71 the default threshold value is 1 cycle. the valid values are in
72 [1-4095].
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76 Intel SapphireRapid supports two encodings for offcore_response events.
77 In the library, these are called OFFCORE_RESPONSE_0 and OFFCORE_RE‐
78 SPONSE_1.
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80 Those events need special treatment in the performance monitoring in‐
81 frastructure because each event uses an extra register to store some
82 settings. Thus, in case multiple offcore_response events are monitored
83 simultaneously, the operating system needs to manage the sharing of
84 that extra register.
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86 The offcore_response events are exposed as a normal events by the li‐
87 brary. The extra settings are exposed as regular umasks. The library
88 takes care of encoding the events according to the underlying kernel
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91 On Intel SapphireRapid unlike older processors, the event is treated as
92 a regular event with a flat set of umasks to choose from. It is not
93 possible to combine the various requests, supplier, snoop bits anymore.
94 Therefore the library offers the list of validated combinations as per
95 Intel's official event list.
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99 Stephane Eranian <eranian@gmail.com>
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103 April, 2022 LIBPFM(3)