1ddi_dma_lim_x86(9S) Data Structures for Drivers ddi_dma_lim_x86(9S)
2
6 ddi_dma_lim_x86 - x86 DMA limits structure
7
9 #include <sys/ddidmareq.h>
10
13 Solaris x86 DDI specific (Solaris x86 DDI). This interface is obsolete.
14
16 A ddi_dma_lim structure describes in a generic fashion the possible
17 limitations of a device or its DMA engine. This information is used by
18 the system when it attempts to set up DMA resources for a device. When
19 the system is requested to perform a DMA transfer to or from an object,
20 the request is broken up, if necessary, into multiple sub-requests.
21 Each sub-request conforms to the limitations expressed in the
22 ddi_dma_lim structure.
23 This structure should be filled in by calling the routine
26 ddi_dmae_getlim(9F). This routine sets the values of the structure mem‐
27 bers appropriately based on the characteristics of the DMA engine on
28 the driver's parent bus. If the driver has additional limitations, it
29 can further restrict some of the values in the structure members. A
30 driver should not relax any restrictions imposed by ddi_dmae_getlim().
31
33 uint_t dlim_addr_lo; /* low range of 32 bit
34 addressing capability */
35 uint_t dlim_addr_hi; /* inclusive upper bound of
36 addressing capability */
37 uint_t dlim_minxfer; /* minimum effective dma transfer size */
38 uint_t dlim_version; /* version number of structure */
39 uint_t dlim_adreg_max; /* inclusive upper bound of
40 incrementing addr reg */
41 uint_t dlim_ctreg_max; /* maximum transfer count minus one */
42 uint_t dlim_granular; /* granularity (and min size) of
43 transfer count */
44 short dlim_sgllen; /* length of DMA scatter/gather list */
45 uint_t dlim_reqsize; /* maximum transfer size in bytes of
46 a single I/O */
47 The dlim_addr_lo and dlim_addr_hi fields specify the address range that
51 the device's DMA engine can access. The dlim_addr_lo field describes
52 the lower 32-bit boundary of the device's DMA engine. The dlim_addr_hi
53 member describes the inclusive, upper 32-bit boundary. The system allo‐
54 cates DMA resources in a way that the address for programming the
55 device's DMA engine will be within this range. For example, if your
56 device can access the whole 32-bit address range, you can use
57 [0,0xFFFFFFFF]. See ddi_dma_cookie(9S) or ddi_dma_segtocookie(9F).
58 The dlim_minxfer field describes the minimum effective DMA transfer
61 size (in units of bytes), which must be a power of two. This value
62 specifies the minimum effective granularity of the DMA engine and
63 describes the minimum amount of memory that can be touched by the DMA
64 transfer. As a resource request is handled by the system, the
65 dlim_minxfer value can be modified. This modification is contingent
66 upon the presence (and use) of I/Ocaches and DMA write buffers between
67 the DMA engine and the object that DMA is being performed on. After DMA
68 resources have been allocated, you can retrieve the resultant minimum
69 transfer value using ddi_dma_devalign(9F).
70 The dlim_version field specifies the version number of this structure.
73 Set this field to DMALIM_VER0.
74 The dlim_adreg_max field describes an inclusive upper bound for the
77 device's DMA engine address register. This bound handles a fairly com‐
78 mon case where a portion of the address register is simply a latch
79 rather than a full register. For example, the upper 16 bits of a 32-bit
80 address register might be a latch. This splits the address register
81 into a portion that acts as a true address register (lower 16 bits) for
82 a 64-kilobyte segment and a latch (upper 16 bits) to hold a segment
83 number. To describe these limits, you specify 0xFFFF in the
84 dlim_adreg_max structure member.
85 The dlim_ctreg_max field specifies the maximum transfer count that the
88 DMA engine can handle in one segment or cookie. The limit is expressed
89 as the maximum count minus one. This transfer count limitation is a
90 per-segment limitation. Because the limitation is used as a bit mask,
91 it must be one less than a power of two.
92 The dlim_granular field describes the granularity of the device's DMA
95 transfer ability, in units of bytes. This value is used to specify, for
96 example, the sector size of a mass storage device. DMA requests are
97 broken into multiples of this value. If there is no scatter/gather
98 capability, then the size of each DMA transfer will be a multiple of
99 this value. If there is scatter/gather capability, then a single seg‐
100 ment cannot be smaller than the minimum transfer value, but can be less
101 than the granularity. However, the total transfer length of the scat‐
102 ter/gather list is a multiple of the granularity value.
103 The dlim_sgllen field specifies the maximum number of entries in the
106 scatter/gather list. This value is the number of segments or cookies
107 that the DMA engine can consume in one I/O request to the device. If
108 the DMA engine has no scatter/gather list, set this field to one.
109 The dlim_reqsize field describes the maximum number of bytes that the
112 DMA engine can transmit or receive in one I/O command. This limitation
113 is only significant if it is less than ( dlim_ctreg_max +1) *
114 dlim_sgllen. If the DMA engine has no particular limitation, set this
115 field to 0xFFFFFFFF.
116
118 See attributes(5) for descriptions of the following attributes:
119 ┌─────────────────────────────┬─────────────────────────────┐
124 │ ATTRIBUTE TYPE │ ATTRIBUTE VALUE │
125 ├─────────────────────────────┼─────────────────────────────┤
126 │Interface Stability │Obsolete │
127 └─────────────────────────────┴─────────────────────────────┘
128
130 ddi_dmae(9F), ddi_dma_addr_setup(9F), ddi_dma_buf_setup(9F),
131 ddi_dma_devalign(9F), ddi_dma_segtocookie(9F), ddi_dma_setup(9F),
132 ddi_dma_cookie(9S), ddi_dma_lim_sparc(9S), ddi_dma_req(9S)
133SunOS 5.11 12 Oct 2005 ddi_dma_lim_x86(9S)