1STRUCT IRQ_CHIP(9)                Structures                STRUCT IRQ_CHIP(9)
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NAME

6       struct_irq_chip - hardware interrupt chip descriptor
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SYNOPSIS

9       struct irq_chip {
10         const char * name;
11         unsigned int (* startup) (unsigned int irq);
12         void (* shutdown) (unsigned int irq);
13         void (* enable) (unsigned int irq);
14         void (* disable) (unsigned int irq);
15         void (* ack) (unsigned int irq);
16         void (* mask) (unsigned int irq);
17         void (* mask_ack) (unsigned int irq);
18         void (* unmask) (unsigned int irq);
19         void (* eoi) (unsigned int irq);
20         void (* end) (unsigned int irq);
21         int (* set_affinity) (unsigned int irq,const struct cpumask *dest);
22         int (* retrigger) (unsigned int irq);
23         int (* set_type) (unsigned int irq, unsigned int flow_type);
24         int (* set_wake) (unsigned int irq, unsigned int on);
25         void (* bus_lock) (unsigned int irq);
26         void (* bus_sync_unlock) (unsigned int irq);
27       #ifdef CONFIG_IRQ_RELEASE_METHOD
28         void (* release) (unsigned int irq, void *dev_id);
29       #endif
30         const char * typename;
31       };
32

MEMBERS

34       name
35           name for /proc/interrupts
36
37       startup
38           start up the interrupt (defaults to ->enable if NULL)
39
40       shutdown
41           shut down the interrupt (defaults to ->disable if NULL)
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43       enable
44           enable the interrupt (defaults to chip->unmask if NULL)
45
46       disable
47           disable the interrupt (defaults to chip->mask if NULL)
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49       ack
50           start of a new interrupt
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52       mask
53           mask an interrupt source
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55       mask_ack
56           ack and mask an interrupt source
57
58       unmask
59           unmask an interrupt source
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61       eoi
62           end of interrupt - chip level
63
64       end
65           end of interrupt - flow level
66
67       set_affinity
68           set the CPU affinity on SMP machines
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70       retrigger
71           resend an IRQ to the CPU
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73       set_type
74           set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
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76       set_wake
77           enable/disable power-management wake-on of an IRQ
78
79       bus_lock
80           function to lock access to slow bus (i2c) chips
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82       bus_sync_unlock
83           function to sync and unlock slow bus (i2c) chips
84
85       release
86           release function solely used by UML
87
88       typename
89           obsoleted by name, kept as migration helper
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AUTHORS

92       Thomas Gleixner <tglx@linutronix.de>
93           Author.
94
95       Ingo Molnar <mingo@elte.hu>
96           Author.
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99Kernel Hackers Manual 2.6.         June 2019                STRUCT IRQ_CHIP(9)
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