1PCI_SET_CACHELINE_SI(9)       Hardware Interfaces      PCI_SET_CACHELINE_SI(9)
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NAME

6       pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is
7       programmed
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SYNOPSIS

10       int pci_set_cacheline_size(struct pci_dev * dev);
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ARGUMENTS

13       dev
14           the PCI device for which MWI is to be enabled
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DESCRIPTION

17       Helper function for pci_set_mwi. Originally copied from
18       drivers/net/acenic.c. Copyright 1998-2001 by Jes Sorensen,
19       <jestrained-monkey.org>.
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RETURNS

22       An appropriate -ERRNO error value on error, or zero for success.
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25Kernel Hackers Manual 3.10         June 2019           PCI_SET_CACHELINE_SI(9)
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