1STRUCT NAND_CHIP(9) Structures STRUCT NAND_CHIP(9)
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6 struct_nand_chip - NAND Private Flash Chip Data
7
9 struct nand_chip {
10 void __iomem * IO_ADDR_R;
11 void __iomem * IO_ADDR_W;
12 uint8_t (* read_byte) (struct mtd_info *mtd);
13 u16 (* read_word) (struct mtd_info *mtd);
14 void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
15 void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len);
16 void (* select_chip) (struct mtd_info *mtd, int chip);
17 int (* block_bad) (struct mtd_info *mtd, loff_t ofs, int getchip);
18 int (* block_markbad) (struct mtd_info *mtd, loff_t ofs);
19 void (* cmd_ctrl) (struct mtd_info *mtd, int dat, unsigned int ctrl);
20 int (* init_size) (struct mtd_info *mtd, struct nand_chip *this,u8 *id_data);
21 int (* dev_ready) (struct mtd_info *mtd);
22 void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column,int page_addr);
23 int(* waitfunc) (struct mtd_info *mtd, struct nand_chip *this);
24 void (* erase_cmd) (struct mtd_info *mtd, int page);
25 int (* scan_bbt) (struct mtd_info *mtd);
26 int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state,int status, int page);
27 int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, int data_len, const uint8_t *buf,int oob_required, int page, int cached, int raw);
28 int (* onfi_set_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para);
29 int (* onfi_get_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para);
30 int chip_delay;
31 unsigned int options;
32 unsigned int bbt_options;
33 int page_shift;
34 int phys_erase_shift;
35 int bbt_erase_shift;
36 int chip_shift;
37 int numchips;
38 uint64_t chipsize;
39 int pagemask;
40 int pagebuf;
41 unsigned int pagebuf_bitflips;
42 int subpagesize;
43 uint8_t cellinfo;
44 int badblockpos;
45 int badblockbits;
46 int onfi_version;
47 struct nand_onfi_params onfi_params;
48 flstate_t state;
49 uint8_t * oob_poi;
50 struct nand_hw_control * controller;
51 struct nand_ecclayout * ecclayout;
52 struct nand_ecc_ctrl ecc;
53 struct nand_buffers * buffers;
54 struct nand_hw_control hwcontrol;
55 uint8_t * bbt;
56 struct nand_bbt_descr * bbt_td;
57 struct nand_bbt_descr * bbt_md;
58 struct nand_bbt_descr * badblock_pattern;
59 void * priv;
60 };
61
63 IO_ADDR_R
64 [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
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66 IO_ADDR_W
67 [BOARDSPECIFIC] address to write the 8 I/O lines of the flash
68 device.
69
70 read_byte
71 [REPLACEABLE] read one byte from the chip
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73 read_word
74 [REPLACEABLE] read one word from the chip
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76 write_buf
77 [REPLACEABLE] write data from the buffer to the chip
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79 read_buf
80 [REPLACEABLE] read data from the chip into the buffer
81
82 select_chip
83 [REPLACEABLE] select chip nr
84
85 block_bad
86 [REPLACEABLE] check, if the block is bad
87
88 block_markbad
89 [REPLACEABLE] mark the block bad
90
91 cmd_ctrl
92 [BOARDSPECIFIC] hardwarespecific function for controlling
93 ALE/CLE/nCE. Also used to write command and address
94
95 init_size
96 [BOARDSPECIFIC] hardwarespecific function for setting mtd->oobsize,
97 mtd->writesize and so on. id_data contains the 8 bytes values of
98 NAND_CMD_READID. Return with the bus width.
99
100 dev_ready
101 [BOARDSPECIFIC] hardwarespecific function for accessing device
102 ready/busy line. If set to NULL no access to ready/busy is
103 available and the ready/busy information is read from the chip
104 status register.
105
106 cmdfunc
107 [REPLACEABLE] hardwarespecific function for writing commands to the
108 chip.
109
110 waitfunc
111 [REPLACEABLE] hardwarespecific function for wait on ready.
112
113 erase_cmd
114 [INTERN] erase command write function, selectable due to AND
115 support.
116
117 scan_bbt
118 [REPLACEABLE] function to scan bad block table
119
120 errstat
121 [OPTIONAL] hardware specific function to perform additional error
122 status checks (determine if errors are correctable).
123
124 write_page
125 [REPLACEABLE] High-level page write function
126
127 onfi_set_features
128 [REPLACEABLE] set the features for ONFI nand
129
130 onfi_get_features
131 [REPLACEABLE] get the features for ONFI nand
132
133 chip_delay
134 [BOARDSPECIFIC] chip dependent delay for transferring data from
135 array to read regs (tR).
136
137 options
138 [BOARDSPECIFIC] various chip options. They can partly be set to
139 inform nand_scan about special functionality. See the defines for
140 further explanation.
141
142 bbt_options
143 [INTERN] bad block specific options. All options used here must
144 come from bbm.h. By default, these options will be copied to the
145 appropriate nand_bbt_descr's.
146
147 page_shift
148 [INTERN] number of address bits in a page (column address bits).
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150 phys_erase_shift
151 [INTERN] number of address bits in a physical eraseblock
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153 bbt_erase_shift
154 [INTERN] number of address bits in a bbt entry
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156 chip_shift
157 [INTERN] number of address bits in one chip
158
159 numchips
160 [INTERN] number of physical chips
161
162 chipsize
163 [INTERN] the size of one chip for multichip arrays
164
165 pagemask
166 [INTERN] page number mask = number of (pages / chip) - 1
167
168 pagebuf
169 [INTERN] holds the pagenumber which is currently in data_buf.
170
171 pagebuf_bitflips
172 [INTERN] holds the bitflip count for the page which is currently in
173 data_buf.
174
175 subpagesize
176 [INTERN] holds the subpagesize
177
178 cellinfo
179 [INTERN] MLC/multichip data from chip ident
180
181 badblockpos
182 [INTERN] position of the bad block marker in the oob area.
183
184 badblockbits
185 [INTERN] minimum number of set bits in a good block's bad block
186 marker position; i.e., BBM == 11110111b is not bad when
187 badblockbits == 7
188
189 onfi_version
190 [INTERN] holds the chip ONFI version (BCD encoded), non 0 if ONFI
191 supported.
192
193 onfi_params
194 [INTERN] holds the ONFI page parameter when ONFI is supported, 0
195 otherwise.
196
197 state
198 [INTERN] the current state of the NAND device
199
200 oob_poi
201 "poison value buffer," used for laying out OOB data before writing
202
203 controller
204 [REPLACEABLE] a pointer to a hardware controller structure which is
205 shared among multiple independent devices.
206
207 ecclayout
208 [REPLACEABLE] the default ECC placement scheme
209
210 ecc
211 [BOARDSPECIFIC] ECC control structure
212
213 buffers
214 buffer structure for read/write
215
216 hwcontrol
217 platform-specific hardware control structure
218
219 bbt
220 [INTERN] bad block table pointer
221
222 bbt_td
223 [REPLACEABLE] bad block table descriptor for flash lookup.
224
225 bbt_md
226 [REPLACEABLE] bad block table mirror descriptor
227
228 badblock_pattern
229 [REPLACEABLE] bad block scan pattern used for initial bad block
230 scan.
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232 priv
233 [OPTIONAL] pointer to private chip data
234
236 Thomas Gleixner <tglx@linutronix.de>
237 Author.
238
240Kernel Hackers Manual 3.10 June 2019 STRUCT NAND_CHIP(9)