1STRUCT NAND_HW_CONTR(9)           Structures           STRUCT NAND_HW_CONTR(9)
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NAME

6       struct_nand_hw_control - Control structure for hardware controller (e.g
7       ECC generator) shared among independent devices
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SYNOPSIS

10       struct nand_hw_control {
11         spinlock_t lock;
12         struct nand_chip * active;
13         wait_queue_head_t wq;
14       };
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MEMBERS

17       lock
18           protection lock
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20       active
21           the mtd device which holds the controller currently
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23       wq
24           wait queue to sleep on if a NAND operation is in progress used
25           instead of the per chip wait queue when a hw controller is
26           available.
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AUTHOR

29       Thomas Gleixner <tglx@linutronix.de>
30           Author.
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33Kernel Hackers Manual 3.10         June 2019           STRUCT NAND_HW_CONTR(9)
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