1I2CSET(8) System Manager's Manual I2CSET(8)
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6 i2cset - set I2C registers
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10 i2cset [-f] [-y] [-m mask] [-r] i2cbus chip-address data-address
11 [value] ... [mode]
12 i2cset -V
13
16 i2cset is a small helper program to set registers visible through the
17 I2C bus.
18
21 -V Display the version and exit.
22 -f Force access to the device even if it is already busy. By
24 default, i2cset will refuse to access a device which is already
25 under the control of a kernel driver. Using this flag is danger‐
26 ous, it can seriously confuse the kernel driver in question. It
27 can also cause i2cset to silently write to the wrong register.
28 So use at your own risk and only if you know what you're doing.
29 -y Disable interactive mode. By default, i2cset will wait for a
31 confirmation from the user before messing with the I2C bus. When
32 this flag is used, it will perform the operation directly. This
33 is mainly meant to be used in scripts.
34 -m mask
36 The mask parameter, if specified, describes which bits of value
37 will be actually written to data-address. Bits set to 1 in the
38 mask are taken from value, while bits set to 0 will be read from
39 data-address and thus preserved by the operation. Please note
40 that this parameter assumes that the read and write operations
41 for the specified mode are symmetrical for the device you are
42 accessing. This may or may not be the case, as neither I2C nor
43 SMBus guarantees this.
44 -r Read back the value right after writing it, and compare the
46 result with the value written. This used to be the default
47 behavior. The same limitations apply as those of option -m.
48 There are three required options to i2cset. i2cbus indicates the number
50 or name of the I2C bus to be scanned. This number should correspond to
51 one of the busses listed by i2cdetect -l. chip-address specifies the
52 address of the chip on that bus, and is an integer between 0x03 and
53 0x77. data-address specifies the address on that chip to write to, and
54 is an integer between 0x00 and 0xFF.
55 The value parameter, if specified, is the value to write to that loca‐
57 tion on the chip. If this parameter is omitted, then a short write is
58 issued. For most chips, it simply sets an internal pointer to the tar‐
59 get location, but doesn't actually write to that location. For a few
60 chips though, in particular simple ones with a single register, this
61 short write is an actual write. If the mode parameter is s or i, multi‐
62 ple values can be specified.
63 The mode parameter, if specified, is one of the letters b, w, s, or i,
65 corresponding to a write size of a single byte, a 16-bit word, a SMBus
66 block write, or an I2C block write, respectively. For SMBus and I2C
67 block writes, the write size is determined by the number of value
68 parameters. Except for I2C block writes, a p can also be appended to
69 the mode parameter to enable PEC. If the mode parameter is omitted,
70 i2cset defaults to byte mode without PEC. The value provided must be
71 within range for the specified data type (0x00-0xFF for byte and block
72 writes, 0x0000-0xFFFF for words). Another possible mode is c, which
73 doesn't write any value (so-called short write). You usually don't have
74 to specify this mode, as it is the default when no value is provided,
75 unless you also want to enable PEC.
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79 i2cset can be extremely dangerous if used improperly. It can confuse
80 your I2C bus, cause data loss, or have more serious side effects. Writ‐
81 ing to a serial EEPROM on a memory DIMM (chip addresses between 0x50
82 and 0x57) may DESTROY your memory, leaving your system unbootable! Be
83 extremely careful using this program.
84
87 Write value 0x42 to 8-bit register 0x11 of the I2C device at 7-bit
88 address 0x2d on bus 1 (i2c-1), after user confirmation:
89 # i2cset 1 0x2d 0x11 0x42
90 Immediately clear the 3 least significant bits of 8-bit register 0x11
92 of the I2C device at 7-bit address 0x2d on bus 1 (i2c-1) (no user con‐
93 firmation):
94 # i2cset -y -m 0x07 1 0x2d 0x11 0x00
95 Write value 0x5000 to 16-bit register 0x02 of the I2C device at 7-bit
97 address 0x48 on bus 1 (i2c-1), after user confirmation:
98 # i2cset 1 0x48 0x02 0x5000 w
99 Also see i2cget(8) for examples of combined usage of i2cset and i2cget.
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104 i2cdetect(8), i2cdump(8), i2cget(8), i2ctransfer(8), isaset(8)
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108 Frodo Looijaard, Mark D. Studebaker and Jean Delvare
109 This manual page was originally written by David Z Maze
111 <dmaze@debian.org> for the Debian GNU/Linux system.
112 October 2017 I2CSET(8)