1LLI(1) LLVM Command Guide LLI(1)
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6 lli - directly execute programs from LLVM bitcode
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9 lli [options] [filename] [program args]
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12 lli directly executes programs in LLVM bitcode format. It takes a
13 program in LLVM bitcode format and executes it using a just-in-time
14 compiler, if one is available for the current architecture, or an
15 interpreter. lli takes all of the same code generator options as llc,
16 but they are only effective when lli is using the just-in-time
17 compiler.
18 If filename is not specified, then lli reads the LLVM bitcode for the
20 program from standard input.
21 The optional args specified on the command line are passed to the
23 program as arguments.
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26 -fake-argv0=executable
27 Override the "argv[0]" value passed into the executing program.
28 -force-interpreter={false,true}
30 If set to true, use the interpreter even if a just-in-time compiler
31 is available for this architecture. Defaults to false.
32 -help
34 Print a summary of command line options.
35 -load=puginfilename
37 Causes lli to load the plugin (shared object) named pluginfilename
38 and use it for optimization.
39 -stats
41 Print statistics from the code-generation passes. This is only
42 meaningful for the just-in-time compiler, at present.
43 -time-passes
45 Record the amount of time needed for each code-generation pass and
46 print it to standard error.
47 -version
49 Print out the version of lli and exit without doing anything else.
50
52 -mtriple=target triple
53 Override the target triple specified in the input bitcode file with
54 the specified string. This may result in a crash if you pick an
55 architecture which is not compatible with the current system.
56 -march=arch
58 Specify the architecture for which to generate assembly, overriding
59 the target encoded in the bitcode file. See the output of llc
60 -help for a list of valid architectures. By default this is
61 inferred from the target triple or autodetected to the current
62 architecture.
63 -mcpu=cpuname
65 Specify a specific chip in the current architecture to generate
66 code for. By default this is inferred from the target triple and
67 autodetected to the current architecture. For a list of available
68 CPUs, use: llvm-as < /dev/null | llc -march=xyz -mcpu=help
69 -mattr=a1,+a2,-a3,...
71 Override or control specific attributes of the target, such as
72 whether SIMD operations are enabled or not. The default set of
73 attributes is set by the current CPU. For a list of available
74 attributes, use: llvm-as < /dev/null | llc -march=xyz -mattr=help
75
77 -disable-excess-fp-precision
78 Disable optimizations that may increase floating point precision.
79 -enable-finite-only-fp-math
81 Enable optimizations that assumes only finite floating point math.
82 That is, there is no NAN or Inf values.
83 -enable-unsafe-fp-math
85 Causes lli to enable optimizations that may decrease floating point
86 precision.
87 -soft-float
89 Causes lli to generate software floating point library calls
90 instead of equivalent hardware instructions.
91
93 -code-model=model
94 Choose the code model from:
95 default: Target default code model
97 small: Small code model
98 kernel: Kernel code model
99 medium: Medium code model
100 large: Large code model
101 -disable-post-RA-scheduler
103 Disable scheduling after register allocation.
104 -disable-spill-fusing
106 Disable fusing of spill code into instructions.
107 -enable-correct-eh-support
109 Make the -lowerinvoke pass insert expensive, but correct, EH code.
110 -jit-enable-eh
112 Exception handling should be enabled in the just-in-time compiler.
113 -join-liveintervals
115 Coalesce copies (default=true).
116 -nozero-initialized-in-bss Don't place zero-initialized symbols into
118 the BSS section.
119 -pre-RA-sched=scheduler
120 Instruction schedulers available (before register allocation):
121 =default: Best scheduler for the target
123 =none: No scheduling: breadth first sequencing
124 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
125 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
126 =list-burr: Bottom-up register reduction list scheduling
127 =list-tdrr: Top-down register reduction list scheduling
128 =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
129 -regalloc=allocator
131 Register allocator to use (default=linearscan)
132 =bigblock: Big-block register allocator
134 =linearscan: linear scan register allocator =local - local register allocator
135 =simple: simple register allocator
136 -relocation-model=model
138 Choose relocation model from:
139 =default: Target default relocation model
141 =static: Non-relocatable code =pic - Fully relocatable, position independent code
142 =dynamic-no-pic: Relocatable external references, non-relocatable code
143 -spiller
145 Spiller to use (default=local)
146 =simple: simple spiller
148 =local: local spiller
149 -x86-asm-syntax=syntax
151 Choose style of code to emit from X86 backend:
152 =att: Emit AT&T-style assembly
154 =intel: Emit Intel-style assembly
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157 If lli fails to load the program, it will exit with an exit code of 1.
158 Otherwise, it will return the exit code of the program it executes.
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161 llc
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164 Maintained by the LLVM Team (<http://llvm.org>).
165CVS 2010-05-07 LLI(1)