1LLI(1)                               LLVM                               LLI(1)
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NAME

6       lli - directly execute programs from LLVM bitcode
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SYNOPSIS

9       lli [options] [filename] [program args]
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DESCRIPTION

12       lli directly executes programs in LLVM bitcode format.  It takes a pro‐
13       gram in LLVM bitcode format and executes it using a  just-in-time  com‐
14       piler or an interpreter.
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16       lli  is  not an emulator. It will not execute IR of different architec‐
17       tures and it can only interpret (or JIT-compile) for the host architec‐
18       ture.
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20       The JIT compiler takes the same arguments as other tools, like llc, but
21       they don't necessarily work for the interpreter.
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23       If filename is not specified, then lli reads the LLVM bitcode  for  the
24       program from standard input.
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26       The  optional args specified on the command line are passed to the pro‐
27       gram as arguments.
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GENERAL OPTIONS

30       -fake-argv0=executable
31              Override the argv[0] value passed into the executing program.
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33       -force-interpreter={false,true}
34              If set to true, use the interpreter even if a just-in-time  com‐
35              piler is available for this architecture. Defaults to false.
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37       -help  Print a summary of command line options.
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39       -load=pluginfilename
40              Causes  lli to load the plugin (shared object) named pluginfile‐
41              name and use it for optimization.
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43       -stats Print statistics from the code-generation passes. This  is  only
44              meaningful for the just-in-time compiler, at present.
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46       -time-passes
47              Record  the  amount of time needed for each code-generation pass
48              and print it to standard error.
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50       -version
51              Print out the version of lli and  exit  without  doing  anything
52              else.
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TARGET OPTIONS

55       -mtriple=target triple
56              Override  the  target triple specified in the input bitcode file
57              with the specified string.  This may result in a  crash  if  you
58              pick  an  architecture  which is not compatible with the current
59              system.
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61       -march=arch
62              Specify the architecture for which to generate  assembly,  over‐
63              riding  the  target encoded in the bitcode file.  See the output
64              of llc -help for a list of valid architectures.  By default this
65              is  inferred  from the target triple or autodetected to the cur‐
66              rent architecture.
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68       -mcpu=cpuname
69              Specify a specific chip in the current architecture to  generate
70              code  for.   By  default this is inferred from the target triple
71              and autodetected to the current architecture.   For  a  list  of
72              available  CPUs,  use:  llvm-as  <  /dev/null  |  llc -march=xyz
73              -mcpu=help
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75       -mattr=a1,+a2,-a3,...
76              Override or control specific attributes of the target,  such  as
77              whether  SIMD operations are enabled or not.  The default set of
78              attributes is set by the current CPU.  For a list  of  available
79              attributes,   use:   llvm-as   <   /dev/null  |  llc  -march=xyz
80              -mattr=help
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FLOATING POINT OPTIONS

83       -disable-excess-fp-precision
84              Disable optimizations that may increase  floating  point  preci‐
85              sion.
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87       -enable-no-infs-fp-math
88              Enable optimizations that assume no Inf values.
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90       -enable-no-nans-fp-math
91              Enable optimizations that assume no NAN values.
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93       -enable-unsafe-fp-math
94              Causes  lli  to  enable optimizations that may decrease floating
95              point precision.
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97       -soft-float
98              Causes lli to generate software  floating  point  library  calls
99              instead of equivalent hardware instructions.
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CODE GENERATION OPTIONS

102       -code-model=model
103              Choose the code model from:
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105                 default: Target default code model
106                 small: Small code model
107                 kernel: Kernel code model
108                 medium: Medium code model
109                 large: Large code model
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111       -disable-post-RA-scheduler
112              Disable scheduling after register allocation.
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114       -disable-spill-fusing
115              Disable fusing of spill code into instructions.
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117       -jit-enable-eh
118              Exception  handling  should  be enabled in the just-in-time com‐
119              piler.
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121       -join-liveintervals
122              Coalesce copies (default=true).
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124       -nozero-initialized-in-bss
125              Don't place zero-initialized symbols into the BSS section.
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127       -pre-RA-sched=scheduler
128              Instruction schedulers available (before register allocation):
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130                 =default: Best scheduler for the target
131                 =none: No scheduling: breadth first sequencing
132                 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
133                 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
134                 =list-burr: Bottom-up register reduction list scheduling
135                 =list-tdrr: Top-down register reduction list scheduling
136                 =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
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138       -regalloc=allocator
139              Register allocator to use (default=linearscan)
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141                 =bigblock: Big-block register allocator
142                 =linearscan: linear scan register allocator =local -   local register allocator
143                 =simple: simple register allocator
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145       -relocation-model=model
146              Choose relocation model from:
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148                 =default: Target default relocation model
149                 =static: Non-relocatable code =pic -   Fully relocatable, position independent code
150                 =dynamic-no-pic: Relocatable external references, non-relocatable code
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152       -spiller
153              Spiller to use (default=local)
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155                 =simple: simple spiller
156                 =local: local spiller
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158       -x86-asm-syntax=syntax
159              Choose style of code to emit from X86 backend:
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161                 =att: Emit AT&T-style assembly
162                 =intel: Emit Intel-style assembly
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EXIT STATUS

165       If lli fails to load the program, it will exit with an exit code of  1.
166       Otherwise, it will return the exit code of the program it executes.
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SEE ALSO

169       llc
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AUTHOR

172       Maintained by The LLVM Team (http://llvm.org/).
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175       2003-2019, LLVM Project
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1806                                 2019-07-25                            LLI(1)
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