1FLASHROM(8) 2019-01-05 FLASHROM(8)
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6 flashrom - detect, read, write, verify and erase flash chips
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9 flashrom [-h|-R|-L|-z|-p <programmername>[:<parameters>]
10 [-E|-r <file>|-w <file>|-v <file>] [-c <chipname>]
11 [(-l <file>|--ifd| --fmap|--fmap-file <file>) [-i <image>]]
12 [-n] [-N] [-f]]
13 [-V[V[V]]] [-o <logfile>]
14
16 flashrom is a utility for detecting, reading, writing, verifying and
17 erasing flash chips. It's often used to flash BIOS/EFI/core‐
18 boot/firmware images in-system using a supported mainboard. However, it
19 also supports various external PCI/USB/parallel-port/serial-port based
20 devices which can program flash chips, including some network cards
21 (NICs), SATA/IDE controller cards, graphics cards, the Bus Pirate
22 device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more.
23 It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32,
25 TSOP40, TSOP48, and BGA chips, which use various protocols such as LPC,
26 FWH, parallel flash, or SPI.
27
29 IMPORTANT: Please note that the command line interface for flashrom
30 will change before flashrom 1.0. Do not use flashrom in scripts or
31 other automated tools without checking that your flashrom version won't
32 interpret options in a different way.
33 You can specify one of -h, -R, -L, -z, -E, -r, -w, -v or no operation.
35 If no operation is specified, flashrom will only probe for flash chips.
36 It is recommended that if you try flashrom the first time on a system,
37 you run it in probe-only mode and check the output. Also you are
38 advised to make a backup of your current ROM contents with -r before
39 you try to write a new image. All operations involving any chip access
40 (probe/read/write/...) require the -p/--programmer option to be used
41 (please see below).
42 -r, --read <file>
44 Read flash ROM contents and save them into the given <file>. If
45 the file already exists, it will be overwritten.
46 -w, --write <file>
48 Write <file> into flash ROM. This will first automatically erase
49 the chip, then write to it.
50 In the process the chip is also read several times. First an in-
52 memory backup is made for disaster recovery and to be able to
53 skip regions that are already equal to the image file. This copy
54 is updated along with the write operation. In case of erase
55 errors it is even re-read completely. After writing has finished
56 and if verification is enabled, the whole flash chip is read out
57 and compared with the input image.
58 -n, --noverify
60 Skip the automatic verification of flash ROM contents after
61 writing. Using this option is not recommended, you should only
62 use it if you know what you are doing and if you feel that the
63 time for verification takes too long.
64 Typical usage is: flashrom -p prog -n -w <file>
66 This option is only useful in combination with --write.
68 -N, --noverify-all
70 Skip not included regions during automatic verification after
71 writing (cf. -l and -i). You should only use this option if
72 you are sure that communication with the flash chip is reliable
73 (e.g. when using the internal programmer). Even if flashrom is
74 instructed not to touch parts of the flash chip, their contents
75 could be damaged (e.g. due to misunderstood erase commands).
76 This option is required to flash an Intel system with locked ME
78 flash region using the internal programmer. It may be enabled by
79 default in this case in the future.
80 -v, --verify <file>
82 Verify the flash ROM contents against the given <file>.
83 -E, --erase
85 Erase the flash ROM chip.
86 -V, --verbose
88 More verbose output. This option can be supplied multiple times
89 (max. 3 times, i.e. -VVV) for even more debug output.
90 -c, --chip <chipname>
92 Probe only for the specified flash ROM chip. This option takes
93 the chip name as printed by flashrom -L without the vendor name
94 as parameter. Please note that the chip name is case sensitive.
95 -f, --force
97 Force one or more of the following actions:
98 * Force chip read and pretend the chip is there.
100 * Force chip access even if the chip is bigger than the maximum
102 supported size for the flash bus.
103 * Force erase even if erase is known bad.
105 * Force write even if write is known bad.
107 -l, --layout <file>
109 Read ROM layout from <file>.
110 flashrom supports ROM layouts. This allows you to flash certain
112 parts of the flash chip only. A ROM layout file contains multi‐
113 ple lines with the following syntax:
114 startaddr:endaddr imagename
116 startaddr and endaddr are hexadecimal addresses within the ROM
118 file and do not refer to any physical address. Please note that
119 using a 0x prefix for those hexadecimal numbers is not neces‐
120 sary, but you can't specify decimal/octal numbers. imagename is
121 an arbitrary name for the region/image from startaddr to
122 endaddr (both addresses included).
123 Example:
125 00000000:00008fff gfxrom
127 00009000:0003ffff normal
128 00040000:0007ffff fallback
129 If you only want to update the image named normal in a ROM based
131 on the layout above, run
132 flashrom -p prog --layout rom.layout --image normal -w
134 some.rom
135 To update only the images named normal and fallback, run:
137 flashrom -p prog -l rom.layout -i normal -i fallback -w
139 some.rom
140 Overlapping sections are not supported.
142 --fmap Read layout from fmap in flash chip.
144 flashrom supports the fmap binary format which is commonly used
146 by coreboot for partitioning a flash chip. The on-chip fmap will
147 be read and used to generate the layout.
148 If you only want to update the COREBOOT region defined in the
150 fmap, run
151 flashrom -p prog --fmap --image COREBOOT -w some.rom
153 --fmap-file <file>
155 Read layout from a <file> containing binary fmap (e.g. coreboot
156 roms).
157 flashrom supports the fmap binary format which is commonly used
159 by coreboot for partitioning a flash chip. The fmap in the spec‐
160 ified file will be read and used to generate the layout.
161 If you only want to update the COREBOOT region defined in the
163 binary fmap file, run
164 flashrom -p prog --fmap-file some.rom --image COREBOOT -w
166 some.rom
167 --ifd Read ROM layout from Intel Firmware Descriptor.
169 flashrom supports ROM layouts given by an Intel Firmware
171 Descriptor (IFD). The on-chip descriptor will be read and used
172 to generate the layout. If you need to change the layout, you
173 have to update the IFD only first.
174 The following ROM images may be present in an IFD:
176 fd the IFD itself
178 bios the host firmware aka. BIOS
179 me Intel Management Engine firmware
180 gbe gigabit ethernet firmware
181 pd platform specific data
182 -i, --image <imagename>
184 Only flash region/image <imagename> from flash layout.
185 -L, --list-supported
187 List the flash chips, chipsets, mainboards, and external pro‐
188 grammers (including PCI, USB, parallel port, and serial port
189 based devices) supported by flashrom.
190 There are many unlisted boards which will work out of the box,
192 without special support in flashrom. Please let us know if you
193 can verify that other boards work or do not work out of the box.
194 IMPORTANT: For verification you have to test an ERASE and/or
196 WRITE operation, so make sure you only do that if you have
197 proper means to recover from failure!
198 -z, --list-supported-wiki
200 Same as --list-supported, but outputs the supported hardware in
201 MediaWiki syntax, so that it can be easily pasted into the sup‐
202 ported hardware wiki page ⟨https://flashrom.org/Supported_hard‐
203 ware⟩. Please note that MediaWiki output is not compiled in by
204 default.
205 -p, --programmer <name>[:parameter[,parameter[,parameter]]]
207 Specify the programmer device. This is mandatory for all opera‐
208 tions involving any chip access (probe/read/write/...). Cur‐
209 rently supported are:
210 * internal (for in-system flashing in the mainboard)
212 * dummy (virtual programmer for testing flashrom)
214 * nic3com (for flash ROMs on 3COM network cards)
216 * nicrealtek (for flash ROMs on Realtek and SMC 1211 network
218 cards)
219 * nicnatsemi (for flash ROMs on National Semiconductor DP838*
221 network cards)
222 * nicintel (for parallel flash ROMs on Intel 10/100Mbit network
224 cards)
225 * gfxnvidia (for flash ROMs on NVIDIA graphics cards)
227 * drkaiser (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)
229 * satasii (for flash ROMs on Silicon Image SATA/IDE controllers)
231 * satamv (for flash ROMs on Marvell SATA controllers)
233 * atahpt (for flash ROMs on Highpoint ATA/RAID controllers)
235 * atavia (for flash ROMs on VIA VT6421A SATA controllers)
237 * atapromise (for flash ROMs on Promise PDC2026x ATA/RAID con‐
239 trollers)
240 * it8212 (for flash ROMs on ITE IT8212F ATA/RAID controller)
242 * ft2232_spi (for SPI flash ROMs attached to an
244 FT2232/FT4232H/FT232H family based USB SPI programmer).
245 * serprog (for flash ROMs attached to a programmer speaking ser‐
247 prog, including some Arduino-based devices).
248 * buspirate_spi (for SPI flash ROMs attached to a Bus Pirate)
250 * dediprog (for SPI flash ROMs attached to a Dediprog SF100)
252 * rayer_spi (for SPI flash ROMs attached to a parallel port by
254 one of various cable types)
255 * pony_spi (for SPI flash ROMs attached to a SI-Prog serial port
257 bitbanging adapter)
258 * nicintel_spi (for SPI flash ROMs on Intel Gigabit network
260 cards)
261 * ogp_spi (for SPI flash ROMs on Open Graphics Project graphics
263 card)
264 * linux_mtd (for SPI flash ROMs accessible via /dev/mtdX on
266 Linux)
267 * linux_spi (for SPI flash ROMs accessible via /dev/spidevX.Y on
269 Linux)
270 * usbblaster_spi (for SPI flash ROMs attached to an Altera USB-
272 Blaster compatible cable)
273 * nicintel_eeprom (for SPI EEPROMs on Intel Gigabit network
275 cards)
276 * mstarddc_spi (for SPI flash ROMs accessible through DDC in
278 MSTAR-equipped displays)
279 * pickit2_spi (for SPI flash ROMs accessible via Microchip
281 PICkit2)
282 * ch341a_spi (for SPI flash ROMs attached to WCH CH341A)
284 * digilent_spi (for SPI flash ROMs attached to iCEblink40 devel‐
286 opment boards)
287 * jlink_spi (for SPI flash ROMs attached to SEGGER J-Link and
289 compatible devices)
290 Some programmers have optional or mandatory parameters which are
292 described in detail in the PROGRAMMER-SPECIFIC INFORMATION sec‐
293 tion. Support for some programmers can be disabled at compile
294 time. flashrom -h lists all supported programmers.
295 -h, --help
297 Show a help text and exit.
298 -o, --output <logfile>
300 Save the full debug log to <logfile>. If the file already
301 exists, it will be overwritten. This is the recommended way to
302 gather logs from flashrom because they will be verbose even if
303 the on-screen messages are not verbose and don't require output
304 redirection.
305 -R, --version
307 Show version information and exit.
308
310 Some programmer drivers accept further parameters to set programmer-
311 specific parameters. These parameters are separated from the programmer
312 name by a colon. While some programmers take arguments at fixed posi‐
313 tions, other programmers use a key/value interface in which the key and
314 value is separated by an equal sign and different pairs are separated
315 by a comma or a colon.
316 internal programmer
318 Board Enables
319 Some mainboards require to run mainboard specific code to enable
321 flash erase and write support (and probe support on old systems
322 with parallel flash). The mainboard brand and model (if it
323 requires specific code) is usually autodetected using one of the
324 following mechanisms: If your system is running coreboot, the
325 mainboard type is determined from the coreboot table. Other‐
326 wise, the mainboard is detected by examining the onboard PCI
327 devices and possibly DMI info. If PCI and DMI do not contain
328 information to uniquely identify the mainboard (which is the
329 exception), or if you want to override the detected mainboard
330 model, you can specify the mainboard using the
331 flashrom -p internal:mainboard=<vendor>:<board> syntax.
333 See the 'Known boards' or 'Known laptops' section in the output
335 of 'flashrom -L' for a list of boards which require the specifi‐
336 cation of the board name, if no coreboot table is found.
337 Some of these board-specific flash enabling functions (called
339 board enables) in flashrom have not yet been tested. If your
340 mainboard is detected needing an untested board enable function,
341 a warning message is printed and the board enable is not exe‐
342 cuted, because a wrong board enable function might cause the
343 system to behave erratically, as board enable functions touch
344 the low-level internals of a mainboard. Not executing a board
345 enable function (if one is needed) might cause detection or
346 erasing failure. If your board protects only part of the flash
347 (commonly the top end, called boot block), flashrom might
348 encounter an error only after erasing the unprotected part, so
349 running without the board-enable function might be dangerous for
350 erase and write (which includes erase).
351 The suggested procedure for a mainboard with untested board spe‐
353 cific code is to first try to probe the ROM (just invoke
354 flashrom and check that it detects your flash chip type) without
355 running the board enable code (i.e. without any parameters). If
356 it finds your chip, fine. Otherwise, retry probing your chip
357 with the board-enable code running, using
358 flashrom -p internal:boardenable=force
360 If your chip is still not detected, the board enable code seems
362 to be broken or the flash chip unsupported. Otherwise, make a
363 backup of your current ROM contents (using -r) and store it to a
364 medium outside of your computer, like a USB drive or a network
365 share. If you needed to run the board enable code already for
366 probing, use it for reading too. If reading succeeds and the
367 contens of the read file look legit you can try to write the new
368 image. You should enable the board enable code in any case now,
369 as it has been written because it is known that writing/erasing
370 without the board enable is going to fail. In any case (success
371 or failure), please report to the flashrom mailing list, see
372 below.
373 Coreboot
376 On systems running coreboot, flashrom checks whether the desired
378 image matches your mainboard. This needs some special board ID
379 to be present in the image. If flashrom detects that the image
380 you want to write and the current board do not match, it will
381 refuse to write the image unless you specify
382 flashrom -p internal:boardmismatch=force
384 ITE IT87 Super I/O
386 If your mainboard is manufactured by GIGABYTE and supports Dual‐
388 BIOS it is very likely that it uses an ITE IT87 series Super I/O
389 to switch between the two flash chips. Only one of them can be
390 accessed at a time and you can manually select which one to use
391 with the
392 flashrom -p internal:dualbiosindex=chip
394 syntax where chip is the index of the chip to use (0 = main, 1 =
396 backup). You can check which one is currently selected by leav‐
397 ing out the chip parameter.
398 If your mainboard uses an ITE IT87 series Super I/O for
400 LPC<->SPI flash bus translation, flashrom should autodetect that
401 configuration. If you want to set the I/O base port of the IT87
402 series SPI controller manually instead of using the value pro‐
403 vided by the BIOS, use the
404 flashrom -p internal:it87spiport=portnum
406 syntax where portnum is the I/O port number (must be a multiple
408 of 8). In the unlikely case flashrom doesn't detect an active
409 IT87 LPC<->SPI bridge, please send a bug report so we can diag‐
410 nose the problem.
411 AMD chipsets
414 Beginning with the SB700 chipset there is an integrated micro‐
416 controller (IMC) based on the 8051 embedded in every AMD south‐
417 bridge. Its firmware resides in the same flash chip as the
418 host's which makes writing to the flash risky if the IMC is
419 active. Flashrom tries to temporarily disable the IMC but even
420 then changing the contents of the flash can have unwanted
421 effects: when the IMC continues (at the latest after a reboot)
422 it will continue executing code from the flash. If the code was
423 removed or changed in an unfortunate way it is unpredictable
424 what the IMC will do. Therefore, if flashrom detects an active
425 IMC it will disable write support unless the user forces it with
426 the
427 flashrom -p internal:amd_imc_force=yes
429 syntax. The user is responsible for supplying a suitable image
431 or leaving out the IMC region with the help of a layout file.
432 This limitation might be removed in the future when we under‐
433 stand the details better and have received enough feedback from
434 users. Please report the outcome if you had to use this option
435 to write a chip.
436 An optional spispeed parameter specifies the frequency of the
438 SPI bus where applicable (i.e. SB600 or later with an SPI flash
439 chip directly attached to the chipset). Syntax is
440 flashrom -p internal:spispeed=frequency
442 where frequency can be '16.5 MHz', '22 MHz', '33 MHz', '66 MHz',
444 '100 MHZ', or '800 kHz'. Support of individual frequencies
445 depends on the generation of the chipset:
446 * SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
448 * SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
450 * Yangtze (with SPI 100 engine as found in Kabini and Tamesh):
452 all of them
453 The default is to use 16.5 MHz and disable Fast Reads.
455 Intel chipsets
457 If you have an Intel chipset with an ICH8 or later southbridge
459 with SPI flash attached, and if a valid descriptor was written
460 to it (e.g. by the vendor), the chipset provides an alternative
461 way to access the flash chip(s) named Hardware Sequencing. It
462 is much simpler than the normal access method (called Software
463 Sequencing), but does not allow the software to choose the SPI
464 commands to be sent. You can use the
465 flashrom -p internal:ich_spi_mode=value
467 syntax where value can be auto, swseq or hwseq. By default (or
469 when setting ich_spi_mode=auto) the module tries to use swseq
470 and only activates hwseq if need be (e.g. if important opcodes
471 are inaccessible due to lockdown; or if more than one flash chip
472 is attached). The other options (swseq, hwseq) select the
473 respective mode (if possible).
474 ICH8 and later southbridges may also have locked address ranges
476 of different kinds if a valid descriptor was written to it. The
477 flash address space is then partitioned in multiple so called
478 "Flash Regions" containing the host firmware, the ME firmware
479 and so on respectively. The flash descriptor can also specify up
480 to 5 so called "Protected Regions", which are freely chosen
481 address ranges independent from the aforementioned "Flash
482 Regions". All of them can be write and/or read protected indi‐
483 vidually.
484 If you have an Intel chipset with an ICH2 or later southbridge
486 and if you want to set specific IDSEL values for a non-default
487 flash chip or an embedded controller (EC), you can use the
488 flashrom -p internal:fwh_idsel=value
490 syntax where value is the 48-bit hexadecimal raw value to be
492 written in the IDSEL registers of the Intel southbridge. The
493 upper 32 bits use one hex digit each per 512 kB range between
494 0xffc00000 and 0xffffffff, and the lower 16 bits use one hex
495 digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
496 The rightmost hex digit corresponds with the lowest address
497 range. All address ranges have a corresponding sister range 4 MB
498 below with identical IDSEL settings. The default value for ICH7
499 is given in the example below.
500 Example: flashrom -p internal:fwh_idsel=0x001122334567
502 Laptops
504 Using flashrom on laptops is dangerous and may easily make your
506 hardware unusable (see also the BUGS section). The embedded con‐
507 troller (EC) in these machines often interacts badly with flash‐
508 ing. More information is in the wiki ⟨https://flashrom.org/Lap‐
509 tops⟩. For example the EC firmware sometimes resides on the
510 same flash chip as the host firmware. While flashrom tries to
511 change the contents of that memory the EC might need to fetch
512 new instructions or data from it and could stop working cor‐
513 rectly. Probing for and reading from the chip may also irritate
514 your EC and cause fan failure, backlight failure, sudden
515 poweroff, and other nasty effects. flashrom will attempt to
516 detect if it is running on a laptop and abort immediately for
517 safety reasons if it clearly identifies the host computer as
518 one. If you want to proceed anyway at your own risk, use
519 flashrom -p internal:laptop=force_I_want_a_brick
521 We will not help you if you force flashing on a laptop because
523 this is a really dumb idea.
524 You have been warned.
526 Currently we rely on the chassis type encoded in the DMI/SMBIOS
528 data to detect laptops. Some vendors did not implement those
529 bits correctly or set them to generic and/or dummy values.
530 flashrom will then issue a warning and bail out like above. In
531 this case you can use
532 flashrom -p internal:laptop=this_is_not_a_laptop
534 to tell flashrom (at your own risk) that it is not running on a
536 laptop.
537 dummy programmer
539 The dummy programmer operates on a buffer in memory only. It
540 provides a safe and fast way to test various aspects of flashrom
541 and is mainly used in development and while debugging. It is
542 able to emulate some chips to a certain degree (basic iden‐
543 tify/read/erase/write operations work).
544 An optional parameter specifies the bus types it should support.
546 For that you have to use the
547 flashrom -p dummy:bus=[type[+type[+type]]]
549 syntax where type can be parallel, lpc, fwh, spi in any order.
551 If you specify bus without type, all buses will be disabled. If
552 you do not specify bus, all buses will be enabled.
553 Example: flashrom -p dummy:bus=lpc+fwh
555 The dummy programmer supports flash chip emulation for automated
557 self-tests without hardware access. If you want to emulate a
558 flash chip, use the
559 flashrom -p dummy:emulate=chip
561 syntax where chip is one of the following chips (please specify
563 only the chip name, not the vendor):
564 * ST M25P10.RES SPI flash chip (128 kB, RES, page write)
566 * SST SST25VF040.REMS SPI flash chip (512 kB, REMS, byte write)
568 * SST SST25VF032B SPI flash chip (4096 kB, RDID, AAI write)
570 * Macronix MX25L6436 SPI flash chip (8192 kB, RDID, SFDP)
572 Example: flashrom -p dummy:emulate=SST25VF040.REMS
574 Persistent images
576 If you use flash chip emulation, flash image persistence is
578 available as well by using the
579 flashrom -p dummy:emulate=chip,image=image.rom
581 syntax where image.rom is the file where the simulated chip con‐
583 tents are read on flashrom startup and where the chip contents
584 on flashrom shutdown are written to.
585 Example: flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin
587 SPI write chunk size
589 If you use SPI flash chip emulation for a chip which supports
591 SPI page write with the default opcode, you can set the maximum
592 allowed write chunk size with the
593 flashrom -p dummy:emulate=chip,spi_write_256_chunksize=size
595 syntax where size is the number of bytes (min. 1, max. 256).
597 Example:
599 flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5
601 SPI blacklist
603 To simulate a programmer which refuses to send certain SPI com‐
605 mands to the flash chip, you can specify a blacklist of SPI com‐
606 mands with the
607 flashrom -p dummy:spi_blacklist=commandlist
609 syntax where commandlist is a list of two-digit hexadecimal rep‐
611 resentations of SPI commands. If commandlist is e.g. 0302,
612 flashrom will behave as if the SPI controller refuses to run
613 command 0x03 (READ) and command 0x02 (WRITE). commandlist may
614 be up to 512 characters (256 commands) long. Implementation
615 note: flashrom will detect an error during command execution.
616 SPI ignorelist
619 To simulate a flash chip which ignores (doesn't support) certain
621 SPI commands, you can specify an ignorelist of SPI commands with
622 the
623 flashrom -p dummy:spi_ignorelist=commandlist
625 syntax where commandlist is a list of two-digit hexadecimal rep‐
627 resentations of SPI commands. If commandlist is e.g. 0302, the
628 emulated flash chip will ignore command 0x03 (READ) and command
629 0x02 (WRITE). commandlist may be up to 512 characters (256 com‐
630 mands) long. Implementation note: flashrom won't detect an
631 error during command execution.
632 SPI status register
635 You can specify the initial content of the chip's status regis‐
637 ter with the
638 flashrom -p dummy:spi_status=content
640 syntax where content is an 8-bit hexadecimal value.
642 nic3com, nicrealtek, nicnatsemi, nicintel, nicintel_eeprom, nicintel_spi,
644 gfxnvidia, ogp_spi, drkaiser, satasii, satamv, atahpt, atavia ,
645 atapromise and it8212 programmers
646 These programmers have an option to specify the PCI address of
647 the card your want to use, which must be specified if more than
648 one card supported by the selected programmer is installed in
649 your system. The syntax is
650 flashrom -p xxxx:pci=bb:dd.f,
652 where xxxx is the name of the programmer, bb is the PCI bus num‐
654 ber, dd is the PCI device number, and f is the PCI function num‐
655 ber of the desired device.
656 Example: flashrom -p nic3com:pci=05:04.0
658 atavia programmer
660 Due to the mysterious address handling of the VIA VT6421A con‐
661 troller the user can specify an offset with the
662 flashrom -p atavia:offset=addr
664 syntax where addr will be interpreted as usual (leading 0x (0)
666 for hexadecimal (octal) values, or else decimal). For more
667 information please see its wiki page
668 ⟨https://flashrom.org/VT6421A⟩.
669 atapromise programmer
671 This programmer is currently limited to 32 kB, regardless of the
672 actual size of the flash chip. This stems from the fact that, on
673 the tested device (a Promise Ultra100), not all of the chip's
674 address lines were actually connected. You may use this program‐
675 mer to flash firmware updates, since these are only 16 kB in
676 size (padding to 32 kB is required).
677 nicintel_eeprom programmer
679 This is the first programmer module in flashrom that does not
680 provide access to NOR flash chips but EEPROMs mounted on gigabit
681 Ethernet cards based on Intel's 82580 NIC. Because EEPROMs nor‐
682 mally do not announce their size nor allow themselves to be
683 identified, the controller relies on correct size values written
684 to predefined addresses within the chip. Flashrom follows this
685 scheme but assumes the minimum size of 16 kB (128 kb) if an
686 unprogrammed EEPROM/card is detected. Intel specifies following
687 EEPROMs to be compatible: Atmel AT25128, AT25256, Micron (ST)
688 M95128, M95256 and OnSemi (Catalyst) CAT25CS128.
689 ft2232_spi programmer
691 This module supports various programmers based on FTDI
692 FT2232/FT4232H/FT232H chips including the DLP Design DLP-
693 USB1232H, openbiosprog-spi, Amontec JTAGkey/JTAGkey-
694 tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster, Olimex ARM-
695 USB-TINY/-H, Olimex ARM-USB-OCD/-H, OpenMoko Neo1973 Debug board
696 (V2+), TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA), TUMPA
697 Lite, GOEPEL PicoTAP and Google Servo v1/v2.
698 An optional parameter specifies the controller type, chan‐
700 nel/interface/port and GPIO-based chip select it should support.
701 For that you have to use the
702 flashrom -p ft2232_spi:type=model,port=interface,csgpiol=gpio
704 syntax where model can be 2232H, 4232H, 232H, jtagkey, bus‐
706 blaster, openmoko, arm-usb-tiny, arm-usb-tiny-h, arm-usb-ocd,
707 arm-usb-ocd-h, tumpa, tumpalite, picotap, google-servo, google-
708 servo-v2 or google-servo-v2-legacy interface can be A, B, C, or
709 D and csgpiol can be a number between 0 and 3, denoting
710 GPIOL0-GPIOL3 correspondingly. The default model is 4232H the
711 default interface is A and GPIO is not used by default.
712 If there is more than one ft2232_spi-compatible device con‐
714 nected, you can select which one should be used by specifying
715 its serial number with the
716 flashrom -p ft2232_spi:serial=number
718 syntax where number is the serial number of the device (which
720 can be found for example in the output of lsusb -v).
721 All models supported by the ft2232_spi driver can configure the
723 SPI clock rate by setting a divisor. The expressible divisors
724 are all even numbers between 2 and 2^17 (=131072) resulting in
725 SPI clock frequencies of 6 MHz down to about 92 Hz for 12 MHz
726 inputs. The default divisor is set to 2, but you can use another
727 one by specifying the optional divisor parameter with the
728 flashrom -p ft2232_spi:divisor=div
730 syntax.
732 serprog programmer
734 This module supports all programmers speaking the serprog proto‐
735 col. This includes some Arduino-based devices as well as various
736 programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi
737 Zhang and many others.
738 A mandatory parameter specifies either a serial device (and baud
740 rate) or an IP/port combination for communicating with the pro‐
741 grammer. The device/baud combination has to start with dev= and
742 separate the optional baud rate with a colon. For example
743 flashrom -p serprog:dev=/dev/ttyS0:115200
745 If no baud rate is given the default values by the operating
747 system/hardware will be used. For IP connections you have to
748 use the
749 flashrom -p serprog:ip=ipaddr:port
751 syntax. In case the device supports it, you can set the SPI
753 clock frequency with the optional spispeed parameter. The fre‐
754 quency is parsed as hertz, unless an M, or k suffix is given,
755 then megahertz or kilohertz are used respectively. Example that
756 sets the frequency to 2 MHz:
757 flashrom -p serprog:dev=/dev/device:baud,spispeed=2M
759 More information about serprog is available in serprog-proto‐
761 col.txt in the source distribution.
762 buspirate_spi programmer
764 A required dev parameter specifies the Bus Pirate device node
765 and an optional spispeed parameter specifies the frequency of
766 the SPI bus. The parameter delimiter is a comma. Syntax is
767 flashrom -p buspirate_spi:dev=/dev/device,spispeed=frequency
769 where frequency can be 30k, 125k, 250k, 1M, 2M, 2.6M, 4M or 8M
771 (in Hz). The default is the maximum frequency of 8 MHz.
772 The baud rate for communication between the host and the Bus
774 Pirate can be specified with the optional serialspeed parameter.
775 Syntax is
776 flashrom -p buspirate_spi:serialspeed=baud
778 where baud can be 115200, 230400, 250000 or 2000000 (2M). The
780 default is 2M baud for Bus Pirate hardware version 3.0 and
781 greater, and 115200 otherwise.
782 An optional pullups parameter specifies the use of the Bus
784 Pirate internal pull-up resistors. This may be needed if you are
785 working with a flash ROM chip that you have physically removed
786 from the board. Syntax is
787 flashrom -p buspirate_spi:pullups=state
789 where state can be on or off. More information about the Bus
791 Pirate pull-up resistors and their purpose is available in a
792 guide by dangerousprototypes ⟨http://dangerousproto‐
793 types.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistors⟩.
794 Only the external supply voltage (Vpu) is supported as of this
795 writing.
796 pickit2_spi programmer
798 An optional voltage parameter specifies the voltage the PICkit2
799 should use. The default unit is Volt if no unit is specified.
800 You can use mV, millivolt, V or Volt as unit specifier. Syntax
801 is
802 flashrom -p pickit2_spi:voltage=value
804 where value can be 0V, 1.8V, 2.5V, 3.5V or the equivalent in mV.
806 An optional spispeed parameter specifies the frequency of the
808 SPI bus. Syntax is
809 flashrom -p pickit2_spi:spispeed=frequency
811 where frequency can be 250k, 333k, 500k or 1M (in Hz). The
813 default is a frequency of 1 MHz.
814 dediprog programmer
816 An optional voltage parameter specifies the voltage the Dediprog
817 should use. The default unit is Volt if no unit is specified.
818 You can use mV, milliVolt, V or Volt as unit specifier. Syntax
819 is
820 flashrom -p dediprog:voltage=value
822 where value can be 0V, 1.8V, 2.5V, 3.5V or the equivalent in mV.
824 An optional device parameter specifies which of multiple con‐
826 nected Dediprog devices should be used. Please be aware that
827 the order depends on libusb's usb_get_busses() function and that
828 the numbering starts at 0. Usage example to select the second
829 device:
830 flashrom -p dediprog:device=1
832 An optional spispeed parameter specifies the frequency of the
834 SPI bus. The firmware on the device needs to be 5.0.0 or newer.
835 Syntax is
836 flashrom -p dediprog:spispeed=frequency
838 where frequency can be 375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M or
840 24M (in Hz). The default is a frequency of 12 MHz.
841 An optional target parameter specifies which target chip should
843 be used. Syntax is
844 flashrom -p dediprog:target=value
846 where value can be 1 or 2 to select target chip 1 or 2 respec‐
848 tively. The default is target chip 1.
849 rayer_spi programmer
851 The default I/O base address used for the parallel port is 0x378
852 and you can use the optional iobase parameter to specify an
853 alternate base I/O address with the
854 flashrom -p rayer_spi:iobase=baseaddr
856 syntax where baseaddr is base I/O port address of the parallel
858 port, which must be a multiple of four. Make sure to not forget
859 the "0x" prefix for hexadecimal port addresses.
860 The default cable type is the RayeR cable. You can use the
862 optional type parameter to specify the cable type with the
863 flashrom -p rayer_spi:type=model
865 syntax where model can be rayer for the RayeR cable, byte‐
867 blastermv for the Altera ByteBlasterMV, stk200 for the Atmel
868 STK200/300, wiggler for the Macraigor Wiggler, xilinx for the
869 Xilinx Parallel Cable III (DLC 5), or spi_tt for SPI Tiny Tools-
870 compatible hardware.
871 More information about the RayeR hardware is available at
873 RayeR's website ⟨http://rayer.g6.cz/elektro/spipgm.htm⟩. The
874 Altera ByteBlasterMV datasheet can be obtained from Altera
875 ⟨http://www.altera.co.jp/literature/ds/dsbytemv.pdf⟩. For more
876 information about the Macraigor Wiggler see their company
877 homepage ⟨http://www.macraigor.com/wiggler.htm⟩. The schematic
878 of the Xilinx DLC 5 was published in a Xilinx user guide
879 ⟨http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf⟩.
880 pony_spi programmer
882 The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3
883 on windows) is specified using the mandatory dev parameter. The
884 adapter type is selectable between SI-Prog (used for SPI devices
885 with PonyProg 2000) or a custom made serial bitbanging
886 programmer named "serbang". The optional type parameter accepts
887 the values "si_prog" (default) or "serbang".
888 Information about the SI-Prog adapter can be found at its
890 website ⟨http://www.lancos.com/siprogsch.html⟩.
891 An example call to flashrom is
893 flashrom -p pony_spi:dev=/dev/ttyS0,type=serbang
895 Please note that while USB-to-serial adapters work under certain
897 circumstances, this slows down operation considerably.
898 ogp_spi programmer
900 The flash ROM chip to access must be specified with the rom
901 parameter.
902 flashrom -p ogp_spi:rom=name
904 Where name is either cprom or s3 for the configuration ROM and
906 bprom or bios for the BIOS ROM. If more than one card supported
907 by the ogp_spi programmer is installed in your system, you have
908 to specify the PCI address of the card you want to use with the
909 pci= parameter as explained in the nic3com et al. section above.
910 linux_mtd programmer
912 You may specify the MTD device to use with the
913 flashrom -p linux_mtd:dev=/dev/mtdX
915 syntax where /dev/mtdX is the Linux device node for your MTD
917 device. If left unspecified the first MTD device found (e.g.
918 /dev/mtd0) will be used by default.
919 Please note that the linux_mtd driver only works on Linux.
921 linux_spi programmer
923 You have to specify the SPI controller to use with the
924 flashrom -p linux_spi:dev=/dev/spidevX.Y
926 syntax where /dev/spidevX.Y is the Linux device node for your
928 SPI controller.
929 In case the device supports it, you can set the SPI clock
931 frequency with the optional spispeed parameter. The frequency is
932 parsed as kilohertz. Example that sets the frequency to 8 MHz:
933 flashrom -p linux_spi:dev=/dev/spidevX.Y,spispeed=8000
935 Please note that the linux_spi driver only works on Linux.
937 mstarddc_spi programmer
939 The Display Data Channel (DDC) is an I2C bus present on VGA and
940 DVI connectors, that allows exchanging information between a
941 computer and attached displays. Its most common uses are getting
942 display capabilities through EDID (at I2C address 0x50) and
943 sending commands to the display using the DDC/CI protocol (at
944 address 0x37). On displays driven by MSTAR SoCs, it is also
945 possible to access the SoC firmware flash (connected to the Soc
946 through another SPI bus) using an In-System Programming (ISP)
947 port, usually at address 0x49. This flashrom module allows the
948 latter via Linux's I2C driver.
949 IMPORTANT: Before using this programmer, the display MUST be in
951 standby mode, and only connected to the computer that will run
952 flashrom using a VGA cable, to an inactive VGA output. It
953 absolutely MUST NOT be used as a display during the procedure!
954 You have to specify the DDC/I2C controller and I2C address to
956 use with the
957 flashrom -p mstarddc_spi:dev=/dev/i2c-X:YY
959 syntax where /dev/i2c-X is the Linux device node for your I2C
961 controller connected to the display's DDC channel, and YY is the
962 (hexadecimal) address of the MSTAR ISP port (address 0x49 is
963 usually used). Example that uses I2C controller /dev/i2c-1 and
964 address 0x49:
965 flashrom -p mstarddc_spi:dev=/dev/i2c-1:49
967 It is also possible to inhibit the reset command that is
969 normally sent to the display once the flashrom operation is
970 completed using the optional noreset parameter. A value of 1
971 prevents flashrom from sending the reset command. Example that
972 does not reset the display at the end of the operation:
973 flashrom -p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
975 Please note that sending the reset command is also inhibited if
977 an error occurred during the operation. To send the reset
978 command afterwards, you can simply run flashrom once more, in
979 chip probe mode (not specifying an operation), without the
980 noreset parameter, once the flash read/write operation you
981 intended to perform has completed successfully.
982 Please also note that the mstarddc_spi driver only works on
984 Linux.
985 ch341a_spi programmer
987 The WCH CH341A programmer does not support any parameters currently.
988 SPI frequency is fixed at 2 MHz, and CS0 is used as per the device.
989 digilent_spi programmer
991 An optional spispeed parameter specifies the frequency of the
992 SPI bus. Syntax is
993 flashrom -p digilent_spi:spispeed=frequency
995 where frequency can be 62.5k, 125k, 250k, 500k, 1M, 2M or 4M (in
997 Hz). The default is a frequency of 4 MHz.
998 jlink_spi programmer
1001 This module supports SEGGER J-Link and compatible devices.
1002 The MOSI signal of the flash chip must be attached to TDI pin of
1004 the programmer, MISO to TDO and SCK to TCK. The chip select
1005 (CS) signal of the flash chip can be attached to different pins
1006 of the programmer which can be selected with the
1007 flashrom -p jlink_spi:cs=pin
1009 syntax where pin can be either TRST or RESET. The default pin
1011 for chip select is RESET. Note that, when using RESET, it is
1012 normal that the indicator LED blinks orange or red.
1013 Additionally, the VTref pin of the programmer must be attached
1014 to the logic level of the flash chip. The programmer measures
1015 the voltage on this pin and generates the reference voltage for
1016 its input comparators and adapts its output voltages to it.
1017 Pinout for devices with 20-pin JTAG connector:
1019 +-------+
1021 | 1 2 | 1: VTref 2:
1022 | 3 4 | 3: TRST 4: GND
1023 | 5 6 | 5: TDI 6: GND
1024 +-+ 7 8 | 7: 8: GND
1025 | 9 10 | 9: TCK 10: GND
1026 | 11 12 | 11: 12: GND
1027 +-+ 13 14 | 13: TDO 14:
1028 | 15 16 | 15: RESET 16:
1029 | 17 18 | 17: 18:
1030 | 19 20 | 19: PWR_5V 20:
1031 +-------+
1032 If there is more than one compatible device connected, you can
1034 select which one should be used by specifying its serial number
1035 with the
1036 flashrom -p jlink_spi:serial=number
1038 syntax where number is the serial number of the device (which
1040 can be found for example in the output of lsusb -v).
1041 The SPI speed can be selected by using the
1043 flashrom -p jlink_spi:spispeed=frequency
1045 syntax where frequency is the SPI clock frequency in kHz. The
1047 maximum speed depends on the device in use.
1048
1052 To back up and update your BIOS, run
1053 flashrom -p internal -r backup.rom -o backuplog.txt
1055 flashrom -p internal -w newbios.rom -o writelog.txt
1056 Please make sure to copy backup.rom to some external media before you
1058 try to write. That makes offline recovery easier.
1059 If writing fails and flashrom complains about the chip being in an
1060 unknown state, you can try to restore the backup by running
1061 flashrom -p internal -w backup.rom -o restorelog.txt
1063 If you encounter any problems, please contact us and supply
1065 backuplog.txt, writelog.txt and restorelog.txt. See section BUGS for
1066 contact info.
1067
1069 flashrom exits with 0 on success, 1 on most failures but with 3 if a
1070 call to mmap() fails.
1071
1073 flashrom needs different access permissions for different programmers.
1074 internal needs raw memory access, PCI configuration space access, raw
1076 I/O port access (x86) and MSR access (x86).
1077 atavia needs PCI configuration space access.
1079 nic3com, nicrealtek and nicnatsemi need PCI configuration space read
1081 access and raw I/O port access.
1082 atahpt needs PCI configuration space access and raw I/O port access.
1084 gfxnvidia, drkaiser and it8212 need PCI configuration space access and
1086 raw memory access.
1087 rayer_spi needs raw I/O port access.
1089 satasii, nicintel, nicintel_eeprom and nicintel_spi need PCI
1091 configuration space read access and raw memory access.
1092 satamv and atapromise need PCI configuration space read access, raw I/O
1094 port access and raw memory access.
1095 serprog needs TCP access to the network or userspace access to a serial
1097 port.
1098 buspirate_spi needs userspace access to a serial port.
1100 ft2232_spi, usbblaster_spi and pickit2_spi need access to the
1102 respective USB device via libusb API version 0.1.
1103 ch341a_spi and dediprog need access to the respective USB device via
1105 libusb API version 1.0.
1106 dummy needs no access permissions at all.
1108 internal, nic3com, nicrealtek, nicnatsemi, gfxnvidia, drkaiser,
1110 satasii, satamv, atahpt, atavia and atapromise have to be run as
1111 superuser/root, and need additional raw access permission.
1112 serprog, buspirate_spi, dediprog, usbblaster_spi, ft2232_spi,
1114 pickit2_spi, ch341a_spi and digilent_spi can be run as normal user on
1115 most operating systems if appropriate device permissions are set.
1116 ogp needs PCI configuration space read access and raw memory access.
1118 On OpenBSD, you can obtain raw access permission by setting
1120 securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into
1121 single user mode.
1122
1124 Please report any bugs to the flashrom mailing list
1125 ⟨flashrom@flashrom.org⟩.
1126 We recommend to subscribe first at
1128 https://flashrom.org/mailman/listinfo/flashrom.
1129 Many of the developers communicate via the #flashrom IRC channel on
1131 chat.freenode.net. If you don't have an IRC client, you can use the
1132 freenode webchat ⟨http://webchat.freenode.net/?channels=flashrom⟩. You
1133 are welcome to join and ask questions, send us bug and success reports
1134 there too. Please provide a way to contact you later (e.g. a mail
1135 address) and be patient if there is no immediate reaction. Also, we
1136 provide a pastebin service ⟨https://paste.flashrom.org⟩ that is very
1137 useful when you want to share logs etc. without spamming the channel.
1138 Laptops
1140 Using flashrom on laptops is dangerous and may easily make your
1141 hardware unusable. flashrom will attempt to detect if it is running on
1142 a laptop and abort immediately for safety reasons. Please see the
1143 detailed discussion of this topic and associated flashrom options in
1144 the Laptops paragraph in the internal programmer subsection of the
1145 PROGRAMMER-SPECIFIC INFORMATION section and the information in our wiki
1146 ⟨https://flashrom.org/Laptops⟩.
1147 One-time programmable (OTP) memory and unique IDs
1149 Some flash chips contain OTP memory often denoted as "security
1150 registers". They usually have a capacity in the range of some bytes to
1151 a few hundred bytes and can be used to give devices unique IDs etc.
1152 flashrom is not able to read or write these memories and may therefore
1153 not be able to duplicate a chip completely. For chip types known to
1154 include OTP memories a warning is printed when they are detected.
1155 Similar to OTP memories are unique, factory programmed, unforgeable
1157 IDs. They are not modifiable by the user at all.
1158
1160 flashrom is covered by the GNU General Public License (GPL), version 2.
1161 Some files are additionally available under any later version of the
1162 GPL.
1163
1165 Please see the individual files.
1166
1168 Andrew Morgan
1169 Carl-Daniel Hailfinger
1170 Claus Gindhart
1171 David Borg
1172 David Hendricks
1173 Dominik Geyer
1174 Eric Biederman
1175 Giampiero Giancipoli
1176 Helge Wagner
1177 Idwer Vollering
1178 Joe Bao
1179 Joerg Fischer
1180 Joshua Roys
1181 Kyösti Mälkki
1182 Luc Verhaegen
1183 Li-Ta Lo
1184 Mark Marshall
1185 Markus Boas
1186 Mattias Mattsson
1187 Michael Karcher
1188 Nikolay Petukhov
1189 Patrick Georgi
1190 Peter Lemenkov
1191 Peter Stuge
1192 Reinder E.N. de Haan
1193 Ronald G. Minnich
1194 Ronald Hoogenboom
1195 Sean Nelson
1196 Stefan Reinauer
1197 Stefan Tauner
1198 Stefan Wildemann
1199 Stephan Guilloux
1200 Steven James
1201 Urja Rannikko
1202 Uwe Hermann
1203 Wang Qingpei
1204 Yinghai Lu
1205 some others, please see the flashrom svn changelog for details.
1206 All still active authors can be reached via the mailing list
1207 ⟨flashrom@flashrom.org⟩.
1208 This manual page was written by Uwe Hermann ⟨uwe@hermann-uwe.de⟩, Carl-
1210 Daniel Hailfinger, Stefan Tauner and others. It is licensed under the
1211 terms of the GNU GPL (version 2 or later).
1212v1.1 2019-01-05 FLASHROM(8)