1DPGEN_FIFO(3) Alliance - genlib User's Manual DPGEN_FIFO(3)
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6 DPGEN_FIFO - FIFO Macro-Generator
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9 #include <genlib.h>
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11 void GENLIB_MACRO (DPGEN_FIFO, char *modelname, long flags, long N);
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14 Generate a FIFO of regNumber words of N bits named modelname.
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16 How it works :
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18 · datain0 and datain1 : the two write busses. Only one is used to actu‐
19 ally write the FIFO, it is selected by the sel signal.
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21 · sel : when set to '0' the datain0 is used to write the register word,
22 otherwise it will be datain1.
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24 · r, rok : set r when a word is requested, rok tells that a word has
25 effectively been popped (rok == not empty).
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27 · w, wok : set w when a word is pushed, wok tells that the word has
28 effectively been pushed (wok == not full).
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30 TERMINAL NAMES
31 1. ck : clock signal (input, 1 bit).
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33 2. reset : reset signal (input, 1 bit).
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35 3. r : read requested (input, 1 bits).
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37 4. w : write requested (input, 1 bits).
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39 5. rok : read acknowledge (output, 1 bits).
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41 6. wok : write acknowledge (output, 1 bits).
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43 7. sel : select the write bus (input, 1 bit).
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45 8. datain0 : first write bus (input, N bits).
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47 9. datain1 : second write bus (input, N bits).
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49 10.
50 dataout : read bus (output, N bits).
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52 11.
53 vdd : power.
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55 12.
56 vss : ground.
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59 GENLIB_MACRO(DPGEN_RF1, "model_fifox8_32"
60 , F_BEHAV|F_PLACE
61 , 32 /* Words size. */
62 , 8 /* Number of words. */
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65 GENLIB_LOINS( "model_fifox8_32"
66 , "instance1_fifo1_32"
67 , "ck"
68 , "r"
69 , "w"
70 , "rok"
71 , "wok"
72 , "sel"
73 , "datain0[31:0]"
74 , "datain1[31:0]"
75 , "dataout[31:0]"
76 , "vdd", "vss", NULL
77 );
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81 GENLIB_MACRO(3), genlib(1)
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85ASIM/LIP6 30 July 2004 DPGEN_FIFO(3)