1PQOS(8) System Manager's Manual PQOS(8)
2
6 pqos, pqos-msr, pqos-os - Intel(R) Resource Director Technology/AMD
7 PQoS monitoring and control tool
8
10 pqos [OPTIONS]...
11
13 Intel(R) Resource Director Technology/AMD PQoS is designed to monitor
14 and manage cpu resources and improve performance of applications and
15 virtual machines.
16 Intel(R) Resource Director Technology/AMD PQoS includes monitoring and
18 control technologies. Monitoring technologies include CMT (Cache Moni‐
19 toring Technology), which monitors occupancy of last level cache, and
20 MBM (Memory Bandwidth Monitoring). Control technologies include CAT
21 (Cache Allocation Technology), CDP (Code Data Prioritization) and MBA
22 (Memory Bandwidth Allocation).
23 pqos supports CMT and MBM on a per core or hardware thread basis. MBM
25 supports two types of events reporting local and remote memory band‐
26 width.
27 pqos-msr and pqos-os are simple pqos wrapper scripts that automatically
28 select the MSR or OS/Kernel library interface to program the technolo‐
29 gies.
30 Please see the -I option below for more information.
31 For hardware information please refer to the README located on:
33 https://github.com/01org/intel-cmt-cat/blob/master/README
34
36 pqos options are as follow:
37 -h, --help
39 show help
40 -v, --verbose
42 verbose mode
43 -V, --super-verbose
45 super-verbose mode
46 -l FILE, --log-file=FILE
48 log messages into selected log FILE
49 -s, --show
51 show the current allocation and monitoring configuration
52 -d, --display
54 display supported Intel(R) Resource Director Technology/AMD PQoS
55 capabilities
56 -D, --display-verbose
58 display supported Intel(R) Resource Director Technology/AMD PQoS
59 capabilities in verbose mode
60 -f FILE, --config-file=FILE
62 load commands from selected configuration FILE
63 -e CLASSDEF, --alloc-class=CLASSDEF
65 define the allocation classes on all CPU sockets. CLASSDEF for‐
66 mat is "TYPE:ID=DEFINITION;...".
67 define classes for selected CPU resources. CLASSDEF format is
68 "TYPE[@RESOURCE_ID]:ID=DEFINITION;...".
69 For CAT, TYPE is "llc" for the last level cache (aka l3) and
70 "l2" for level 2 cache, ID is a CLOS number and DEFINITION is a
71 bitmask.
72 For MBA, TYPE is "mba", ID is a CLOS number and DEFINITION is a
73 value between 1 and 100 representing the percentage of available
74 memory bandwidth.
75 For MBA CTRL, TYPE is "mba_max", ID is a CLOS number and DEFINI‐
76 TION is a value representing the requested memory bandwidth
77 specified in MBps.
78 RESOURCE_ID is a unique number that can represent a socket or
79 l2/l3 cache identifier. The RESOURCE_ID for each logical CPU can
80 be found using "pqos -s"
81 Note: When L2/L3 CDP is on, ID can be postfixed with 'D' for
82 data or 'C' for code.
83 Note: L2/L3 CDP is available on selected CPUs only.
84 Note: MBA CTRL is supported only by the OS interface and
85 requires Linux and kernel version 4.18 or newer.
86 Some examples:
87 "-e llc:0=0xffff;llc:1=0x00ff"
88 "-e llc@0-1:2=0xff00;l2:2=0x3f;l2@2:1=0xf"
89 "-e llc:0d=0xfff;llc:0c=0xfff00"
90 "-e l2:0d=0xf;l2:0c=0xc"
91 "-e mba:1=30;mba@1:3=80"
92 "-e mba_max:1=6000;mba_max@1:3=10000"
93 Note:
94 "-e l2:2=0x3f" means that COS2 for all L2 cache clusters
95 is changed to 0x3f.
96 "-e l2@2:1=0xf" means that COS1 for L2 cache cluster 2 is
97 changed to 0xf.
98 "-e mba:1=30" means that COS1, on all sockets, can uti‐
99 lize up to 30% of available memory bandwidth.
100 "-e mba_max:1=6000" means that COS1, on all sockets, can
101 utilize up to 6000 MBps of memory bandwidth.
102 -a CLASS2ID, --alloc-assoc=CLASS2ID
104 associate allocation classes with cores. CLASS2ID format is
105 "TYPE:ID=CORE_LIST;..." or "TYPE:ID=TASK_LIST;...".
106 For CAT, TYPE is "llc", "core" or "pid" and ID is a class num‐
107 ber. CORE_LIST is comma or dash separated list of cores.
108 TASK_LIST is comma or dash separated list of process/task ID's.
109 For example:
110 "-a llc:0=0,2,4,6-10;llc:1=1;" associates cores 0, 2, 4,
111 6, 7, 8, 9, 10 with CAT class 0 and core 1 with class 1.
112 "-a core:0=0,2,4,6-10;core:1=1;" associates cores 0, 2,
113 4, 6, 7, 8, 9, 10 with CAT class 0 and core 1 with class
114 1.
115 "-I -a pid:0=3543,7643,4556;pid:1=7644;" associates
116 process ID 3543, 7643, 4556 with CAT class 0 and process
117 ID 7644 with class 1.
118 Note:
119 The -I option must be used for PID association.
120 -R [CONFIG[,CONFIG]], --alloc-reset[=CONFIG[,CONFIG]]
122 reset allocation setting (L3 CAT, L2 CAT, MBA) and reconfigure
123 L3 CDP. CONFIG is one of the following options:
124 l3cdp-on sets L3 CDP on
125 l3cdp-off sets L3 CDP off
126 l3cdp-any keeps current L3 CDP setting (default)
127 l2cdp-on sets L2 CDP on
128 l2cdp-off sets L2 CDP off
129 l2cdp-any keeps current L2 CDP setting (default)
130 mbaCtrl-on sets MBA CTRL on
131 mbaCtrl-off sets MBA CTRL off
132 mbaCtrl-any keeps current MBA CTRL setting (default)
133 -m EVTCORES, --mon-core=EVTCORES
135 select the cores and events for monitoring, EVTCORES format is
136 "EVENT:CORE_LIST". Valid EVENT settings are:
137 - "llc" for CMT (LLC occupancy)
138 - "mbr" for MBR (remote memory bandwidth)
139 - "mbl" for MBL (local memory bandwidth)
140 - "mbt" for MBT (total memory bandwidth)
141 - "all" or "" for all detected event types (except MBT)
142 CORE_LIST is comma or dash separated list of cores.
143 Example "-m all:0,2,4-10;llc:1,3;mbr:11-12".
144 Core statistics can be grouped by enclosing the core list in
145 square brackets.
146 Example "-m llc:[0-3];all:[4,5,6];mbr:[0-3],7,8".
147 -p [EVTPIDS], --mon-pid[=EVTPIDS]
149 select top 10 most active (CPU utilizing) process ids to monitor
150 or select the process ids and events to monitor, EVTPIDS format
151 is "EVENT:PID_LIST".
152 See -m option for valid EVENT settings. PID_LIST is comma sepa‐
153 rated list of process ids.
154 Examples:
155 "-p llc:22,25673"
156 "-p all:892,4588-4592"
157 Process's IDs can be grouped by enclosing them in square brack‐
159 ets.
160 Examples:
161 "-p llc:[22,25673]"
162 "-p all:892,[4588-4592]"
163 Note:
165 Requires Linux and kernel versions 4.10 and newer.
166 The -I option must be used for PID monitoring.
167 It is not possible to track both processes and cores at
168 the same time.
169 -T, --mon-top
171 enable top like monitoring output sorted by highest LLC occu‐
172 pancy
173 -o FILE, --mon-file FILE
175 select output FILE to store monitored data in, the default is
176 'stdout'
177 -u TYPE, --mon-file-type=TYPE
179 select the output format TYPE for monitored data. Supported TYPE
180 settings are: "text" (default), "xml" and "csv".
181 -i INTERVAL, --mon-interval=INTERVAL
183 define monitoring sampling INTERVAL in 100ms units, 1=100ms,
184 default 10=10x100ms=1s
185 -t SECONDS, --mon-time=SECONDS
187 define monitoring time in seconds, use 'inf' or 'infinite' for
188 infinite monitoring. Use CTRL+C to stop monitoring at any time.
189 -r, --mon-reset
191 reset monitoring and use all RMID's and cores in the system
192 --disable-mon-ipc
194 Disable IPC monitoring
195 --disable-mon-llc_miss
197 Disable LLC misses monitoring
198 -H, --profile-list
200 list supported allocation profiles
201 -c PROFILE, --profile-set=PROFILE
203 select a PROFILE from predefined allocation classes, use -H to
204 list available profiles
205 -I, --iface-os
207 set the library interface to use the kernel implementation. If
208 not set the default implementation is to program the MSR's
209 directly.
210
212 CMT, MBM and CAT are configured using Model Specific Registers (MSRs).
213 The pqos software executes in user space, and access to the MSRs is
214 obtained through a standard Linux* interface. The msr file interface is
215 protected and requires root privileges. The msr driver might not be
216 auto-loaded and on some modular kernels the driver may need to be
217 loaded manually:
218 For Linux:
220 sudo modprobe msr
221 For FreeBSD:
223 sudo kldload cpuctl
224 Interface enforcement:
226 If you require system wide interface enforcement you can do so by set‐
227 ting the "RDT_IFACE" environment variable.
228
230 msr(4)
231
233 pqos was written by Tomasz Kantecki <tomasz.kantecki@intel.com>, Marcel
234 Cornu <marcel.d.cornu@intel.com>, Aaron Hetherington <aaron.hethering‐
235 ton@intel.com>
236 This is free software; see the source for copying conditions. There is
238 NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR
239 PURPOSE.
240 May 08, 2020 PQOS(8)