intel_reg(1)

1INTEL_REG(1)                General Commands Manual               INTEL_REG(1)
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NAME

6       intel_reg - Intel graphics register multitool
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SYNOPSIS

9       intel_reg [OPTIONS] COMMAND
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DESCRIPTION

12       Intel  graphics register multitool. Read, write, dump, and decode Intel
13       graphics MMIO and sideband registers, and more.
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OPTIONS

16       Some options are global, and some specific to commands.
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18       --verbose
19              Increase verbosity.
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21       --quiet
22              Decrease verbosity.
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24       --count=N
25              Read N registers.
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27       --binary
28              Output binary values.
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30       --all  Decode registers for all known platforms.
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32       --mmio=FILE
33              Use MMIO bar from FILE.
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35       --devid=DEVID
36              Pretend to be PCI ID DEVID. Useful with MMIO bar snapshots  from
37              other machines.
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39       --spec=PATH
40              Read register spec from directory or file specified by PATH; see
41              REGISTER SPEC DEFINITIONS below for details.
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43       --help Show brief help.
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COMMANDS

46       See REGISTER REFERENCES below on how to describe registers for the com‐
47       mands.
48
49   read [--count=N] REGISTER [...]
50       Dump  each specified REGISTER, or N registers starting from each REGIS‐
51       TER.
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53   write REGISTER VALUE [REGISTER VALUE ...]
54       Write each VALUE to corresponding REGISTER.
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56   dump [--mmio=FILE --devid=DEVID]
57       Dump all registers specified in the register spec.
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59   decode REGISTER VALUE
60       Decode REGISTER VALUE.
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62   snapshot
63       Output the MMIO bar to stdout. The output can be used for a later invo‐
64       cation  of  dump or read with the --mmio=FILE and --devid=DEVID parame‐
65       ters.
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67   list
68       List the known registers.
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70   help
71       Display brief help.
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REGISTER REFERENCES

74       Registers are defined as  [(PORTNAME|PORTNUM|ENGINE|MMIO-OFFSET):](REG‐
75       NAME|REGADDR).
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77       PORTNAME
78              The  register  access  method, most often MMIO, which is the de‐
79              fault. The methods supported on all platforms are "mmio",  "por‐
80              tio-vga", and "mmio-vga".
81
82              On  BYT  and  CHV,  the  sideband  ports "bunit", "punit", "nc",
83              "dpio", "gpio-nc", "cck", "ccu", "dpio2", and "flisdsi" are also
84              supported.
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86       PORTNUM
87              Port  number  for  the  sideband ports supported on BYT and CHV.
88              Only numbers mapped to the supported ports  are  allowed,  arbi‐
89              trary numbers are not accepted.
90
91              Numbers  above  0xff  are automatically interpreted as MMIO off‐
92              sets, not port numbers.
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94       ENGINE Instead of cpu based MMIO, specified engine can be used for  ac‐
95              cess  method.  Batchbuffer will be targeted for the engine to do
96              read/write. The list of available engines is  architecture  spe‐
97              cific  and  can be found with "intel_reg help". Prefixing engine
98              name with '-' uses non-privileged batchbuffer for access.
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100       MMIO-OFFSET
101              Use MMIO, and add this offset to the register address.
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103              Numbers equal to or below 0xff are automatically interpreted  as
104              port numbers, not MMIO offsets.
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106       REGNAME
107              Name of the register as defined in the register spec.
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109              If MMIO offset is not specified, it is picked up from the regis‐
110              ter spec. However, ports are not; the port is  a  namespace  for
111              the register names.
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113       REGADDR
114              Register  address.  The  corresponding register name need not be
115              specified in the register spec.
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ENVIRONMENT

118       INTEL_REG_SPEC
119              Path to a directory or a file containing register  spec  defini‐
120              tions.
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REGISTER SPEC DEFINITIONS

123       A  register  spec associates register names with addresses. The spec is
124       searched for in this order:
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126       1. Directory or file specified by the --spec option.
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128       2. Directory or file specified by the INTEL_REG_SPEC environment  vari‐
129          able.
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131       3. Builtin  register  spec. Also used as fallback with a warning if the
132          above are used but fail.
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134       If a directory is specified using --spec option or INTEL_REG_SPEC envi‐
135       ronment  variable, the directory is scanned for a spec file in this or‐
136       der:
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138       1. File named after the PCI device id. For example, "0412".
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140       2. File named after the code name in  lowercase,  without  punctuation.
141          For example, "valleyview".
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143       3. File  named  after  generation.  For example, "gen7" (note that this
144          matches valleyview, ivybridge and haswell!).
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146   Register Spec File Format
147       The register spec format is briefly described below:
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149       • Empty lines and lines beginning with "#", ";", or "//" are ignored.
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151       • Lines not beginning with "(" are interpreted as file names,  absolute
152         or relative, to be included.
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154       • Lines beginning with "(" are interpreted as register definitions.
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156       Registers  are defined as tuples ('REGNAME', 'REGADDR', 'PORTNAME|PORT‐
157       NUM|MMIO-OFFSET'), as in REGISTER REFERENCES above. The  port  descrip‐
158       tion may also be an empty string to denote MMIO.
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160       Examples:
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162       • # this is a comment, below is an include
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164       • vlv_pipe_a.txt
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166       • ('GEN6_PMINTRMSK', '0x0000a168', '')
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168       • ('MIPIA_PORT_CTRL', '0x61190', '0x180000')
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170       • ('PLL1_DW0', '0x8000', 'DPIO')
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BUGS

173       Reading some registers may hang the GPU or the machine.
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REPORTING BUGS

176       Report bugs to https://bugs.freedesktop.org.
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AUTHOR

179       Jani Nikula <jani.nikula@intel.com>
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COPYRIGHT

182       2015-2016 Intel Corporation
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187igt-gpu-tools 1.26                2016-03-01                      INTEL_REG(1)