1LIBPFM(3) Linux Programmer's Manual LIBPFM(3)
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6 libpfm_intel_skx_unc_cha - support for Intel Skylake X Server CHA-Box
7 uncore PMU
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10 #include <perfmon/pfmlib.h>
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12 PMU name: skx_unc_cha[0-27]
13 PMU desc: Intel Skylake X CHA uncore PMU
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17 The library supports the Intel Skylake X CHA-Box (coherency and home
18 agent engine) uncore PMU. There is one CHA-box PMU per physical core.
19 Therefore there are up to twenty-eight identical CHA-Box PMU instances
20 numbered from 0 up to possibly 27. On dual-socket systems, the number
21 refers to the CHA-Box PMU on the socket where the program runs. For
22 instance, if running on CPU18, then skx_unc_cha0 refers to the CHA-Box
23 for physical core 0 on socket 1. Conversely, if running on CPU0, then
24 the same skx_unc_cha0 refers to the CHA-Box for physical core 0 but on
25 socket 0.
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27 Each CHA-Box PMU implements 4 generic counters and two filter registers
28 used only with certain events and umasks. The filters are either
29 accessed via modifiers (see below) or umasks, such as the opcode or
30 cache state filter.
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34 The following modifiers are supported on Intel Skylake CHA-Box uncore
35 PMU:
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37 e Enable edge detection, i.e., count only when there is a state
38 transition from no occurrence of the event to at least one
39 occurrence. This modifier must be combined with a threshold mod‐
40 ifier (t) with a value greater or equal to one. This is a bool‐
41 ean modifier.
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43 t Set the threshold value. When set to a non-zero value, the
44 counter counts the number of C-Box cycles in which the number of
45 occurrences of the event is greater or equal to the threshold.
46 This is an integer modifier with values in the range [0:255].
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48 i Invert the meaning of the event. The counter will now count
49 cycles in which the event is not occurring. This is a boolean
50 modifier.
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52 loc Match on local node target. This filter is only supported on
53 UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
54 filter.
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56 rem Match on remote node target. This filter is only supported on
57 UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
58 filter.
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60 lmem Match near memory cacheable. This filter is only supported on
61 UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
62 filter.
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64 rmem Match not near memory cacheable. This filter is only supported
65 on UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
66 filter.
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68 nc Match non-coherent requests. This filter is only supported on
69 UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
70 filter.
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72 isoc Match isochronous requests. This filter is only supported on
73 UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY. This is a boolean
74 filter.
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78 Events UNC_C_TOR_INSERTS and UNC_C_TOR_OCCUPANCY support opcode match‐
79 ing. The processor implements two opcode filters. Both are used at the
80 same time. The OPC0 umasks correspond to the first opcode matcher and
81 OPC1 to the second opcode matcher. If only one opcode must be tracked
82 then the unused filter will be set to 0. The opcode umasks must be used
83 in combination with a specific queue umask otherwise the library will
84 reject the event. The umask description shows which queue umask is
85 required for each opcode. For instance, OPC0_RFO/OPC1_RFO require the
86 IRQ queue and thus the IRQ umask.
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88 The opcode match umasks can be combined with other modifiers.
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92 Stephane Eranian <eranian@gmail.com>
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96 January, 2018 LIBPFM(3)