1CXL-DISABLE-PORT(1) CXL-DISABLE-PORT(1)
2
3
4
6 cxl-disable-port - activate / hot-add a given CXL port
7
9 cxl disable-port <port0> [<port1>..<portN>] [<options>]
10
11 For test and debug scenarios, disable a CXL port and any memory devices
12 dependent on this port being active for CXL.mem operation.
13
15 -e, --endpoint
16 Toggle from treating the port arguments as Switch Port identifiers
17 to Endpoint Port identifiers.
18
19 -f, --force
20 DANGEROUS: Override the safety measure that blocks attempts to
21 disable a port if the tool determines a descendent memdev is in
22 active usage. Recall that CXL memory ranges might have been
23 established by platform firmware and disabling an active device is
24 akin to force removing memory from a running system.
25
26 Toggle from treating the port arguments as Switch Port identifiers to
27 Endpoint Port identifiers.
28
29 --debug
30 If the cxl tool was built with debug disabled, turn on debug
31 messages.
32
34 Copyright © 2016 - 2022, Intel Corporation. License GPLv2: GNU GPL
35 version 2 http://gnu.org/licenses/gpl.html. This is free software: you
36 are free to change and redistribute it. There is NO WARRANTY, to the
37 extent permitted by law.
38
40 linkcxl:cxl-disable-port[1]
41
42
43
44 03/08/2022 CXL-DISABLE-PORT(1)