1LIBPFM(3)                  Linux Programmer's Manual                 LIBPFM(3)
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NAME

6       libpfm_intel_icl - support for Intel IceLake core PMU
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SYNOPSIS

9       #include <perfmon/pfmlib.h>
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11       PMU name: icl
12       PMU desc: Intel IceLake
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DESCRIPTION

16       The  library  supports  the  Intel IceLake core PMU. It should be noted
17       that this PMU model only covers each core's  PMU  and  not  the  socket
18       level PMU.
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20       On  IceLake, the number of generic counters depends on the Hyperthread‐
21       ing (HT) mode.
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23       The pfm_get_pmu_info() function returns the maximum number  of  generic
24       counters in num_cntrs.
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MODIFIERS

28       The following modifiers are supported on Intel IceLake processors:
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30       u      Measure  at  user level which includes privilege levels 1, 2, 3.
31              This corresponds to PFM_PLM3.  This is a boolean modifier.
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33       k      Measure at kernel level which includes privilege level  0.  This
34              corresponds to PFM_PLM0.  This is a boolean modifier.
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36       i      Invert  the meaning of the event. The counter will now count cy‐
37              cles in which the event is not occurring. This is a boolean mod‐
38              ifier
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40       e      Enable  edge  detection,  i.e., count only when there is a state
41              transition from no occurrence of the event to at least  one  oc‐
42              currence.  This  modifier  must  be combined with a counter mask
43              modifier (m) with a value greater or equal to one.   This  is  a
44              boolean modifier.
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46       c      Set  the  counter  mask value. The mask acts as a threshold. The
47              counter will count the number of cycles in which the  number  of
48              occurrences  of  the event is greater or equal to the threshold.
49              This is an integer modifier with values in the range [0:255].
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51       ldlat  Pass a latency threshold to  the  MEM_TRANS_RETIRED:LOAD_LATENCY
52              event.   This  is an integer attribute that must be in the range
53              [3:65535]. It is required for this event.  Note that  the  event
54              must be used with precise sampling (PEBS).
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56       intx   Monitor  the  event  only  when executing inside a transactional
57              memory region (in tx). Event does not count otherwise. This is a
58              boolean modifiers. Default value is 0.
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60       intxcp Do  not  count  occurrences of the event when they are inside an
61              aborted transactional memory region. This is a boolean modifier.
62              Default value is 0.
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64       fe_thres
65              This modifier is for the FRONTEND_RETIRED event only. It defines
66              the period in core cycles after which  the  IDQ_*_BUBBLES  umask
67              counts.  It  acts  as  a threshold, i.e., at least a period of N
68              core cycles where the frontend did not deliver X  uops.  It  can
69              only  be  used  with the IDQ_*_BUBBLES umasks. If not specified,
70              the default threshold value is 1 cycle. the valid values are  in
71              [1-4095].
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OFFCORE_RESPONSE events

75       Intel  IceLake  supports  two encodings for offcore_response events. In
76       the  library,  these  are  called  OFFCORE_RESPONSE_0  and  OFFCORE_RE‐
77       SPONSE_1.
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79       Those  events  need special treatment in the performance monitoring in‐
80       frastructure because each event uses an extra register  to  store  some
81       settings.  Thus, in case multiple offcore_response events are monitored
82       simultaneously, the operating system needs to  manage  the  sharing  of
83       that extra register.
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85       The  offcore_response  events are exposed as a normal events by the li‐
86       brary. The extra settings are exposed as regular  umasks.  The  library
87       takes  care  of  encoding the events according to the underlying kernel
88       interface.
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90       On Intel IceLake unlike older processors, the event  is  treated  as  a
91       regular event with a flat set of umasks to choose from.  It is not pos‐
92       sible to combine the various requests, supplier,  snoop  bits  anymore.
93       Therefore  the library offers the list of validated combinations as per
94       Intel's official event list.
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AUTHORS

98       Stephane Eranian <eranian@gmail.com>
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102                                 August, 2015                        LIBPFM(3)
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