1DRUC(1) ALLIANCE USER COMMANDS DRUC(1)
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6 druc - Design Rule Checker
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9 druc input_name [ -v ] [ -h ]
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13 This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM
14 team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris,
15 France.
16 Web : http://asim.lip6.fr/recherche/alliance/
18 E-mail : alliance-users@asim.lip6.fr
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21 DRuC is a general parametrized VLSI design rule checker.
22 This tool replace the VERSATIL tool that is not anymore supported.
23 This manual presents the layout rules for tle ALLIANCE symbolic layout
24 approach. The rules are described in a technology file defined by the
25 environment variable RDS_TECHNO_NAME (see below).
26 The root cell and all the instantiated cells (except the intanciated
27 libraries cells) must be in the current directory.
28 The default mode of DRuC is (currently) full flat: it first flatten all
29 the hierarchy in order to obtain a flat, rectangle level description.
30
32 -v Verbose mode on. Each step of the DRC is output on the standard
33 output
34 -h Hierarchical design rule checking. Generates lots of files
36 locally, to be used by future invocation of druc. Don't ask me
37 if and how this works, but since you also fetched the sources,
38 ...
39
41 0: LAYER NAME.
42 This section explicits the layer name used in the following rules.
43 - NWELL : N well
44 - NTIE : N well polarisation
45 - PTIE : P substrat polarisation
46 - NDIF : N diffusion
47 - PDIF : P diffusion
48 - GATE : transistor gate
49 - POLY : polysilicon wire
50 - ALU1 : first level of metal
51 - ALU2 : second level of metal
52 - CONT : contact between ALU1 and POLY or DIFF
53 - VIA : contact between ALU1 and ALU2
54 I: LAYER WIDTH.
55 This class of rules deals with the width limits of a layer. and the
56 conditions for equipotentiality between two overlapping or abutting
57 segments.
58 rule 1 :
60 the minimum width for a segment of NWELL is 4
61 corresponding error codes are : 100 101
62 rule 2 :
63 the minimum width for a segment of NTIE is 2
64 corresponding error code is : 119
65 rule 3 :
66 the minimum width for a segment of PTIE is 2
67 corresponding error codes are : 122 123
68 rule 4 :
69 the minimum width for a segment of NDIF is 2
70 corresponding error codes are : 140 141
71 rule 5 :
72 the minimum width for a segment of PDIF is 2
73 corresponding error codes are : 165 166
74 rule 6 :
75 the minimum width for a segment of GATE is 1
76 corresponding error codes are : 234 235
77 rule 7 :
78 the minimum width for a segment of POLY is 1
79 corresponding error codes are : 234 235
80 rule 8 :
81 the minimum width for a segment of ALU1 is 1
82 corresponding error codes are : 238 239
83 rule 9 :
84 the minimum width for a segment of ALU2 is 2
85 corresponding error codes are : 242 243
86 rule 10 :
87 the width of a CONT must be equal to 1
88 corresponding error codes are : 246 247
89 rule 11 :
90 the width of a VIA must be equal to 1
91 corresponding error codes are : 261 262
92 II: FORBIDDEN OVERLAP
93 This class of rules specifies the forbidden overlaps between two lay‐
95 ers. (The distance between them must be strictly positive)
96 rule 12 :
97 contact between PTIE and NWELL is forbidden.
98 corresponding error codes are : 126 127 128 129 130 131
99 rule 13 :
100 contact between PTIE and NTIE is forbidden.
101 corresponding error codes are : 133 134 135 136 137 138
102 rule 14 :
103 contact between NDIF and NWELL is forbidden.
104 corresponding error codes are : 144 145 146 147 148 149
105 rule 15 :
106 contact between NDIF and NTIE is forbidden.
107 corresponding error codes are : 151 152 153 154 155 156
108 rule 16 :
109 contact between NDIF and PTIE is forbidden.
110 corresponding error codes are : 158 159 160 161 162 163
111 rule 17 :
112 contact between PDIF and NTIE is forbidden.
113 corresponding error codes are : 169 170 171 172 173 174
114 rule 18 :
115 contact between PDIF and PTIE is forbidden.
116 corresponding error codes are : 176 177 178 179 180 181
117 rule 19 :
118 contact between PDIF and NDIF is forbidden.
119 corresponding error codes are : 183 184 185 186 187 188
120 rule 20 :
121 contact between GATE and NTIE is forbidden.
122 corresponding error codes are : 191 192 193 194 195 196
123 rule 21 :
124 contact between GATE and PTIE is forbidden.
125 corresponding error codes are : 198 199 200 201 202 203
126 rule 22 :
127 contact between POLY and NTIE is forbidden.
128 corresponding error codes are : 207 208 209 210 211 212
129 rule 23 :
130 contact between POLY and PTIE is forbidden.
131 corresponding error codes are : 214 215 216 217 218 219
132 rule 24 :
133 contact between POLY and NDIF is forbidden.
134 corresponding error codes are : 221 222 223 224 225 226
135 rule 25 :
136 contact between POLY and PDIF is forbidden.
137 corresponding error codes are : 228 229 230 231 232 233
138 rule 26 :
139 contact between CONT and GATE or POLY is forbidden.
140 corresponding error codes are : 249 250 251 252 253
141 rule 27 :
142 contact between VIA and GATE is forbidden.
143 corresponding error codes are : 264 265 266 267 268 269
144 rule 28 :
145 contact between VIA and POLY is forbidden.
146 corresponding error codes are : 271 272 273 274 275 276
147 rule 29 :
148 contact between VIA and CONT is forbidden.
149 corresponding error codes are : 278 279 280 281 282 283
150 rule 30 :
151 contact between NTIE and NWELL is forbidden.
152 corresponding error code is : 109
153 rule 31 :
154 contact between PDIF and NWELL is forbidden.
155 corresponding error code is : 117
156 III: LAYER NOTCH.
157 This class of rules deals with the notch limits of a layer.
158 rule 32 :
159 the minimum notch for a segment of NWELL is 4
160 corresponding error code is : 102
161 rule 33 :
162 the minimum notch for a segment of NTIE is 2
163 corresponding error code is : 120
164 rule 34 :
165 the minimum notch for a segment of PTIE is 2
166 corresponding error code is : 124
167 rule 35 :
168 the minimum notch for a segment of NDIF is 2
169 corresponding error code is : 142
170 rule 36 :
171 the minimum notch for a segment of PDIF is 2
172 corresponding error code is : 167
173 rule 37 :
174 the minimum notch for a segment of POLY is 1
175 corresponding error code is : 236
176 rule 38 :
177 the minimum notch for a segment of ALU1 is 2.5
178 corresponding error code is : 240
179 rule 39 :
180 the minimum notch for a segment of ALU2 is 2
181 corresponding error code is : 244
182 IV: MINIMUM SPACING
183 This class of rules specifies the minimum edge-to-edge distance allowed
184 between two layers.
185 rule 40 :
186 the minimum distance between NWELL and NWELL is 12
187 corresponding error code is : 118
188 rule 42 :
189 the minimum distance between NTIE and NTIE is 3
190 corresponding error code is : 121
191 rule 43 :
192 the minimum distance between PTIE and NWELL is 7.5
193 corresponding error code is : 125
194 rule 44 :
195 the minimum distance between PTIE and NTIE is 8
196 corresponding error code is : 132
197 rule 45 :
198 the minimum distance between PTIE and PTIE is 3
199 corresponding error code is : 139
200 rule 46 :
201 the minimum distance between NDIF and NWELL is 7.5
202 corresponding error code is : 143
203 rule 47 :
204 the minimum distance between NDIF and NTIE is 8
205 corresponding error code is : 150
206 rule 48 :
207 the minimum distance between NDIF and PTIE is 3
208 corresponding error code is : 157
209 rule 49 :
210 the minimum distance between NDIF and NDIF is 3
211 corresponding error code is : 164
212 rule 51 :
213 the minimum distance between PDIF and NTIE is 3
214 corresponding error code is : 168
215 rule 52 :
216 the minimum distance between PDIF and PTIE is 8
217 corresponding error code is : 175
218 rule 53 :
219 the minimum distance between PDIF and NDIF is 8
220 corresponding error code is : 182
221 rule 54 :
222 the minimum distance between PDIF and PDIF is 3
223 corresponding error code is : 189
224 rule 55 :
225 the minimum distance between GATE and NTIE is 1
226 corresponding error code is : 190
227 rule 56 :
228 the minimum distance between GATE and PTIE is 1
229 corresponding error code is : 197
230 rule 57 :
231 the minimum distance between GATE and NDIF is 1
232 corresponding error code is : 204
233 rule 58 :
234 the minimum distance between GATE and PDIF is 1
235 corresponding error code is : 205
236 rule 59 :
237 the minimum distance between GATE and GATE is 2
238 corresponding error code is : 237
239 rule 60 :
240 the minimum distance between POLY and NTIE is 1
241 corresponding error code is : 206
242 rule 61 :
243 the minimum distance between POLY and PTIE is 1
244 corresponding error code is : 213
245 rule 62 :
246 the minimum distance between POLY and NDIF is 1
247 corresponding error code is : 220
248 rule 63 :
249 the minimum distance between POLY and PDIF is 1
250 corresponding error code is : 227
251 rule 64 :
252 the minimum distance between POLY and GATE is 2
253 corresponding error code is : 237
254 rule 65 :
255 the minimum distance between POLY and POLY is 2
256 corresponding error code is : 237
257 rule 66 :
258 the minimum distance between ALU1 and ALU1 is 2.5
259 corresponding error code is : 241
260 rule 67 :
261 the minimum distance between ALU2 and ALU2 is 2
262 corresponding error code is : 245
263 rule 68 :
264 the minimum distance between CONT and CONT is 3
265 corresponding error code is : 254
266 rule 69 :
267 the minimum distance between VIA and GATE is 2
268 corresponding error code is : 263
269 rule 70 :
270 the minimum distance between VIA and POLY is 2
271 corresponding error code is : 270
272 rule 71 :
273 the minimum distance between VIA and CONT is 2
274 corresponding error code is : 277
275 rule 72 :
276 the minimum distance between VIA and VIA is 3
277 corresponding error code is : 284
278 rule 73 :
279 the minimum distance between CONT and GATE or POLY is 1.5
280 corresponding error code is : 248
281 V: TOTAL INCLUSION.
282 The last class of rules deals with the inclusion of a layer in another
283 one.
284 rule 74 :
285 NTIE must be included in NWELL with a minimun margin of 0.5
286 corresponding error code is : 103
287 rule 75 :
288 PDIF must be included in NWELL with a minimun margin of 0.5
289 corresponding error code is : 110
290
292 If design errors are found, DRuC produces the list of them in two files
293 :
294 - <root_name.drc>:
296 This ascii file contains the list of DRC violations.
297 - <root_name.iii>:
299 This gds ro cif file contains only rectangles detected in viola‐
300 tion.
301 ( suffix iii is defined with the environment )
302 RDS_OUT_PH is default setted to gds.
304
306 DRuC uses several environment variables:
307 - MBK_IN_PH - defines the layout input format.
308 - RDS_OUT_PH - defines the layout output format.
309 - RDS_TECHNO_NAME - defines the technology file.
310 - MBK_CATA_LIB - defines the catalog directory.
311 See the corresponding manual pages for further information.
313
315 druc register
316ASIM/LIP6 October 1, 1997 DRUC(1)