1LIBPFM(3) Linux Programmer's Manual LIBPFM(3)
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6 libpfm_intel_snb - support for Intel Sandy Bridge core PMU
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9 #include <perfmon/pfmlib.h>
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11 PMU name: snb
12 PMU desc: Intel Sandy Bridge
13 PMU name: snb_ep
14 PMU desc: Intel Sandy Bridge EP
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18 The library supports the Intel Sandy Bridge core PMU. It should be
19 noted that this PMU model only covers each core's PMU and not the
20 socket level PMU. For that refer to the Sandy Bridge uncore PMU sup‐
21 port.
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23 On Sandy Bridge, the number of generic counters depends on the Hyper‐
24 threading (HT) mode. When HT is on, then only 4 generic counters are
25 available. When HT is off, then 8 generic counters are available. The
26 pfm_get_pmu_info() function returns the maximum number of generic coun‐
27 ters in num_cntrs.
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31 The following modifiers are supported on Intel Sandy Bridge processors:
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33 u Measure at user level which includes privilege levels 1, 2, 3.
34 This corresponds to PFM_PLM3. This is a boolean modifier.
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36 k Measure at kernel level which includes privilege level 0. This
37 corresponds to PFM_PLM0. This is a boolean modifier.
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39 i Invert the meaning of the event. The counter will now count
40 cycles in which the event is not occurring. This is a boolean
41 modifier
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43 e Enable edge detection, i.e., count only when there is a state
44 transition from no occurrence of the event to at least one
45 occurrence. This modifier must be combined with a counter mask
46 modifier (m) with a value greater or equal to one. This is a
47 boolean modifier.
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49 c Set the counter mask value. The mask acts as a threshold. The
50 counter will count the number of cycles in which the number of
51 occurrences of the event is greater or equal to the threshold.
52 This is an integer modifier with values in the range [0:255].
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54 t Measure on both threads at the same time assuming hyper-thread‐
55 ing is enabled. This is a boolean modifier.
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57 ldlat Pass a latency threshold to the
58 MEM_TRANS_RETIRED:LATENCY_ABOVE_THRESHOLD event. This is an
59 integer attribute that must be in the range [3:65535]. It is
60 required for this event. Note that the event must be used with
61 precise sampling (PEBS).
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65 Intel Sandy Bridge provides two offcore_response events, like Intel
66 Westmere. They are called OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1.
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68 Those events need special treatment in the performance monitoring in‐
69 frastructure because each event uses an extra register to store some
70 settings. Thus, in case multiple offcore_response events are monitored
71 simultaneously, the kernel needs to manage the sharing of that extra
72 register.
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74 The offcore_response events are exposed as a normal events by the
75 library. The extra settings are exposed as regular umasks. The library
76 takes care of encoding the events according to the underlying kernel
77 interface.
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79 On Intel Sandy Bridge, the umasks are divided into three categories:
80 request, supplier and snoop. The user must provide at least one umask
81 for each category. The categories are shown in the umask descriptions.
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83 There is also the special response umask called ANY_RESPONSE. When this
84 umask is used then it overrides any supplier and snoop umasks. In other
85 words, users can specify either ANY_RESPONSE OR any combinations of
86 supplier + snoops.
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88 In case no supplier or snoop is specified, the library defaults to
89 using ANY_RESPONSE.
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91 For instance, the following are valid event selections:
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93 OFFCORE_RESPONSE_0:DMND_DATA_RD:ANY_RESPONSE
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95 OFFCORE_RESPONSE_0:ANY_REQUEST
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97 OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY
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100 But the following are illegal:
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103 OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:ANY_RESPONSE
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105 OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY:ANY_RESPONSE
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109 libpfm_snb_unc(3)
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113 Stephane Eranian <eranian@gmail.com>
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117 January, 2011 LIBPFM(3)