1HCT::lang::hdl::vhdl(3)User Contributed Perl DocumentatioHnCT::lang::hdl::vhdl(3)
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NAME

6       HCT::lang::hdl::vhdl - Class of VHDL language.
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DESCRIPTION

9       VHDL (VHSIC (Very High Speed Integrated Circuits) hardware description
10       language) is commonly used as a design-entry language for field-
11       programmable gate arrays and application-specific integrated circuits
12       in electronic design automation of digital circuits.
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DESIGN

15       VHDL is a fairly general-purpose language, and it doesn't require a
16       simulator on which to run the code. There are a lot of VHDL compilers,
17       which build executable binaries. It can read and write files on the
18       host computer, so a VHDL program can be written that generates another
19       VHDL program to be incorporated in the design being developed. Because
20       of this general-purpose nature, it is possible to use VHDL to write a
21       testbench that verifies the functionality of the design using files on
22       the host computer to define stimuli, interacts with the user, and
23       compares results with those expected. VHDL is a strongly typed
24       language.
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28perl v5.36.0                      2022-07-21           HCT::lang::hdl::vhdl(3)
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