1GENLIB_LORES.3(August 16, 2002) GENLIB_LORES.3(August 16, 2002)
2
3
4
6 GENLIB_LORES - add a logical resistor to the current netlist figure
7
9 #include <genlib.h>
10
11 void GENLIB_LORES(type,resi,rcon1,rcon1,name)
12 char type ;
13 double resi ;
14 char ∗rcon1, ∗rcon1 ;
15 char ∗name ;
16
18 type Type of the resistor to be created in the current
19 figure
20
21 resi Resistance value.
22
23 rcon1, rcon1 Name of the signals on which the given resistor
24 connectors are to be linked.
25
26 name Resistor name. The unicity of the name is not
27 checked.
28
30 LORES adds a logical resistor to the current working figure. This
31 resistor has each of its pin logicaly linked to the adequat signal
32 given as parameter. For the time being, the type attribut may take the
33 following value:
34
35 RESMIM for a MIM (metal) type resistor.
36
38 "GENLIB_LORES impossible : missing GENLIB_DEF_LOFIG"
39 No figure has been yet specified by a call to DEF_LOFIG. So it
40 isn't possible to add anything. you must call DEF_LOFIG before
41 any other netlist call.
42
44 #include <genlib.h>
45
46 int main(int argc,char ∗argv[])
47 {
48 /∗ Create a figure to work on, a parallel resistor ∗/
49 GENLIB_DEF_LOFIG("parallel_res") ;
50
51 /∗ Define interface ∗/
52 GENLIB_LOCON("i",IN,"input") ;
53 GENLIB_LOCON("f",OUT,"output") ;
54
55 /∗ Add resistors ∗/
56 GENLIB_LORES(RESMIM,5.1,"input","output","res1") ;
57 GENLIB_LORES(RESMIM,5.2,"input","output","res2") ;
58
59 /∗ Save all that on disk ∗/
60 GENLIB_SAVE_LOFIG() ;
61
62 return 0 ;
63 }
64
66 genlib(1), GENLIB_BUS(3), GENLIB_ELM(3), GENLIB_LOINS(3), GEN‐
67 LIB_LOCON(3).
68
69
70
71
72
73
74PROCEDURAL GENERATION LANGUAGE ASIM/LIP6 GENLIB_LORES.3(August 16, 2002)