1I2CGET(8) System Manager's Manual I2CGET(8)
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6 i2cget - read from I2C/SMBus chip registers
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10 i2cget [-f] [-y] [-a] i2cbus chip-address [data-address [mode
11 [length]]]
12 i2cget -V
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16 i2cget is a small helper program to read registers visible through the
17 I2C bus (or SMBus).
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21 -V Display the version and exit.
22 -f Force access to the device even if it is already busy. By de‐
24 fault, i2cget will refuse to access a device which is already
25 under the control of a kernel driver. Using this flag is danger‐
26 ous, it can seriously confuse the kernel driver in question. It
27 can also cause i2cget to return an invalid value. So use at your
28 own risk and only if you know what you're doing.
29 -y Disable interactive mode. By default, i2cget will wait for a
31 confirmation from the user before messing with the I2C bus. When
32 this flag is used, it will perform the operation directly. This
33 is mainly meant to be used in scripts. Use with caution.
34 -a Allow using addresses between 0x00 - 0x07 and 0x78 - 0x7f. Not
36 recommended.
37 There are two required options to i2cget. i2cbus indicates the number
39 or name of the I2C bus to be scanned. This number should correspond to
40 one of the busses listed by i2cdetect -l. chip-address specifies the
41 address of the chip on that bus, and is an integer between 0x08 and
42 0x77.
43 data-address specifies the address on that chip to read from, and is an
45 integer between 0x00 and 0xFF. If omitted, the currently active regis‐
46 ter will be read (if that makes sense for the considered chip).
47 The mode parameter, if specified, is one of the letters b, w, c, or i,
49 corresponding to a read byte data, a read word data, a write byte/read
50 byte, an SMBus block read, or an I2C block read transaction, respec‐
51 tively. A p can also be appended to the mode parameter to enable PEC,
52 except for I2C block transactions. If the mode parameter is omitted,
53 i2cget defaults to a read byte data transaction, unless data-address is
54 also omitted, in which case the default (and only valid) transaction is
55 a single read byte.
56 The length parameter, if applicable and specified, sets the length of
58 the block transaction. Valid values are between 1 and 32. Default value
59 is 32.
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63 i2cget can be extremely dangerous if used improperly. I2C and SMBus are
64 designed in such a way that an SMBus read transaction can be seen as a
65 write transaction by certain chips. This is particularly true if set‐
66 ting mode to cp (write byte/read byte with PEC). Be extremely careful
67 using this program.
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71 Get the value of 8-bit register 0x11 of the I2C device at 7-bit address
72 0x2d on bus 1 (i2c-1), after user confirmation:
73 # i2cget 1 0x2d 0x11
74 Get the value of 16-bit register 0x00 of the I2C device at 7-bit ad‐
76 dress 0x48 on bus 1 (i2c-1), after user confirmation:
77 # i2cget 1 0x48 0x00 w
78 Set the internal pointer register of a 24C02 EEPROM at 7-bit address
80 0x50 on bus 9 (i2c-9) to 0x00, then read the first 2 bytes from that
81 EEPROM:
82 # i2cset -y 9 0x50 0x00 ; i2cget -y 9 0x50 ; i2cget -y 9 0x50
83 This assumes that the device automatically increments its internal
84 pointer register on every read, and supports read byte transactions
85 (read without specifying the register address, "Receive Byte" in SMBus
86 terminology.) Most EEPROM devices behave that way. Note that this is
87 only safe as long as nobody else is accessing the I2C device at the
88 same time. A safer approach would be to use a "Read Word" SMBus trans‐
89 action instead, or an I2C Block Read transaction to read more than 2
90 bytes.
91 Set the internal pointer register of a 24C32 EEPROM at 7-bit address
93 0x53 on bus 9 (i2c-9) to 0x0000, then read the first 2 bytes from that
94 EEPROM:
95 # i2cset -y 9 0x53 0x00 0x00 ; i2cget -y 9 0x53 ; i2cget -y 9 0x53
96 This again assumes that the device automatically increments its inter‐
97 nal pointer register on every read, and supports read byte transac‐
98 tions. While the previous example was for a small EEPROM using 8-bit
99 internal addressing, this example is for a larger EEPROM using 16-bit
100 internal addressing. Beware that running this command on a small EEPROM
101 using 8-bit internal addressing would actually write 0x00 to the first
102 byte of that EEPROM. The safety concerns raised above still stand, how‐
103 ever in this case there is no SMBus equivalent, so this is the only way
104 to read data from a large EEPROM if your master isn't fully I2C capa‐
105 ble. With a fully I2C capable master, you would use i2ctransfer to
106 achieve the same in a safe and faster way.
107 Read the first 8 bytes of an EEPROM device at 7-bit address 0x50 on bus
109 4 (i2c-4):
110 # i2cget -y 4 0x50 0x00 i 8
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114 To report bugs or send fixes, please write to the Linux I2C mailing
115 list <linux-i2c@vger.kernel.org> with Cc to the current maintainer:
116 Jean Delvare <jdelvare@suse.de>.
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120 i2cdetect(8), i2cdump(8), i2cset(8), i2ctransfer(8)
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124 Jean Delvare
125 This manual page was strongly inspired from those written by David Z
127 Maze for i2cset.
128 July 2021 I2CGET(8)