1csx_Parse_CISTPL_CFTABLE_EKNeTrRnYe(l9FF)unctions forcsDxr_iPvaerrsse_CISTPL_CFTABLE_ENTRY(9F)
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NAME

6       csx_Parse_CISTPL_CFTABLE_ENTRY  - parse 16-bit Card Configuration Table
7       Entry tuple
8

SYNOPSIS

10       #include <sys/pccard.h>
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12
13
14       int32_t csx_Parse_CISTPL_CFTABLE_ENTRY(client_handle_t ch, tuple_t *tu,
15            cistpl_cftable_entry_t *cft);
16
17

INTERFACE LEVEL

19       Solaris DDI Specific (Solaris DDI)
20

PARAMETERS

22       ch     Client handle returned from csx_RegisterClient(9F).
23
24
25       tu     Pointer to a tuple_t structure (see tuple(9S)) returned   by   a
26              call  to csx_GetFirstTuple(9F) or csx_GetNextTuple(9F).
27
28
29       cft    Pointer to a cistpl_cftable_entry_t structure which contains the
30              parsed CISTPL_CFTABLE_ENTRY tuple information upon  return  from
31              this function.
32
33

DESCRIPTION

35       This  function  parses the 16 bit Card Configuration Table Entry tuple,
36       CISTPL_CFTABLE_ENTRY, into a form usable by PC Card drivers.
37
38
39       The CISTPL_CFTABLE_ENTRY tuple is used to describe each  possible  con‐
40       figuration of a PC Card and to distinguish among the permitted configu‐
41       rations. The CISTPL_CONFIG tuple must precede all  CISTPL_CFTABLE_ENTRY
42       tuples.
43

STRUCTURE MEMBERS

45       The structure members of cistpl_cftable_entry_t are:
46
47         uint32_t                      flags;     /* valid descriptions */
48         uint32_t                      ifc;       /* interface description */
49                                                  /*  information */
50         uint32_t                      pin;       /* values for PRR */
51         uint32_t                      index;     /* configuration index number */
52         cistpl_cftable_entry_pd_t     pd;        /* power requirements */
53                                                  /* description */
54         cistpl_cftable_entry_speed_t  speed;     /* device speed description */
55         cistpl_cftable_entry_io_t     io;        /* device I/O map */
56         cistpl_cftable_entry_irq_t    irq;       /* device IRQ utilization */
57         cistpl_cftable_entry_mem_t    mem;       /* device memory space */
58         cistpl_cftable_entry_misc_t   misc;      /* miscellaneous
59                                                  /* device features */
60
61
62
63       The flags field is defined and bit-mapped as follows:
64
65       CISTPL_CFTABLE_TPCE_DEFAULT
66
67           This is a default configuration
68
69
70       CISTPL_CFTABLE_TPCE_IF
71
72           If configuration byte exists
73
74
75       CISTPL_CFTABLE_TPCE_FS_PWR
76
77           Power information exists
78
79
80       CISTPL_CFTABLE_TPCE_FS_TD
81
82           Timing information exists
83
84
85       CISTPL_CFTABLE_TPCE_FS_IO
86
87           I/O information exists
88
89
90       CISTPL_CFTABLE_TPCE_FS_IRQ
91
92           IRQ information exists
93
94
95       CISTPL_CFTABLE_TPCE_FS_MEM
96
97           MEM space information exists
98
99
100       CISTPL_CFTABLE_TPCE_FS_MISC
101
102           MISC information exists
103
104
105       CISTPL_CFTABLE_TPCE_FS_STCE_EV
106
107           STCE_EV exists
108
109
110       CISTPL_CFTABLE_TPCE_FS_STCE_PD
111
112           STCE_PD exists
113
114
115
116       If the CISTPL_CFTABLE_TPCE_IF flag is set,  the ifc field is bit-mapped
117       and defined as follows:
118
119       CISTPL_CFTABLE_TPCE_IF_MEMORY
120
121           Memory interface
122
123
124       CISTPL_CFTABLE_TPCE_IF_IO_MEM
125
126           IO and memory
127
128
129       CISTPL_CFTABLE_TPCE_IF_CUSTOM_0
130
131           Custom interface 0
132
133
134       CISTPL_CFTABLE_TPCE_IF_CUSTOM_1
135
136           Custom interface 1
137
138
139       CISTPL_CFTABLE_TPCE_IF_CUSTOM_2
140
141           Custom interface 2
142
143
144       CISTPL_CFTABLE_TPCE_IF_CUSTOM_3
145
146           Custom interface 3
147
148
149       CISTPL_CFTABLE_TPCE_IF_MASK
150
151           Interface type mask
152
153
154       CISTPL_CFTABLE_TPCE_IF_BVD
155
156           BVD active in PRR
157
158
159       CISTPL_CFTABLE_TPCE_IF_WP
160
161           WP active in PRR
162
163
164       CISTPL_CFTABLE_TPCE_IF_RDY
165
166           RDY active in PRR
167
168
169       CISTPL_CFTABLE_TPCE_IF_MWAIT
170
171           WAIT - mem cycles
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173
174
175       pin is a value for the Pin Replacement Register.
176
177
178       index is a configuration index number.
179
180
181       The structure members of cistpl_cftable_entry_pd_t are:
182
183         uint32_t                    flags;     /* which descriptions are valid */
184         cistpl_cftable_entry_pwr_t  pd_vcc;    /* VCC power description */
185         cistpl_cftable_entry_pwr_t  pd_vpp1;   /* Vpp1 power description */
186         cistpl_cftable_entry_pwr_t  pd_vpp2;   /* Vpp2 power description */
187
188
189
190       This flags field is bit-mapped and defined as follows:
191
192       CISTPL_CFTABLE_TPCE_FS_PWR_VCC
193
194           Vcc description valid
195
196
197       CISTPL_CFTABLE_TPCE_FS_PWR_VPP1
198
199           Vpp1 description valid
200
201
202       CISTPL_CFTABLE_TPCE_FS_PWR_VPP2
203
204           Vpp2 description valid
205
206
207
208       The structure members of cistpl_cftable_entry_pwr_t are:
209
210         uint32_t     nomV;        /* nominal supply voltage */
211         uint32_t     nomV_flags;
212         uint32_t     minV;        /* minimum supply voltage */
213         uint32_t     minV_flags;
214         uint32_t     maxV;        /* maximum supply voltage */
215         uint32_t     maxV_flags;
216         uint32_t     staticI;     /* continuous supply current */
217         uint32_t     staticI_flags;
218         uint32_t     avgI;        /* max current required averaged over 1 sec. */
219         uint32_t     avgI_flags;
220         uint32_t     peakI;       /* max current required averaged over 10mS */
221         uint32_t     peakI_flags;
222         uint32_t     pdownI;      /* power down supply current required */
223         uint32_t     pdownI_flags;
224
225
226
227       nomV, minV, maxV,  staticI, avgI, peakI_flag, and  pdownI  are  defined
228       and bit-mapped as follows:
229
230       CISTPL_CFTABLE_PD_NOMV       Nominal supply voltage
231
232
233       CISTPL_CFTABLE_PD_MINV       Minimum supply voltage
234
235
236       CISTPL_CFTABLE_PD_MAXV       Maximum supply voltage
237
238
239       CISTPL_CFTABLE_PD_STATICI    Continuous supply current
240
241
242       CISTPL_CFTABLE_PD_AVGI       Maximum    current    required    averaged
243                                    over 1 second
244
245
246       CISTPL_CFTABLE_PD_PEAKI      Maximum    current    required    averaged
247                                    over 10mS
248
249
250       CISTPL_CFTABLE_PD_PDOWNI     Power down supply current required
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252
253
254       nomV_flags,    minV_flags,   maxV_flags,   staticI_flags,   avgI_flags,
255       peakI_flags, and pdownI_flags are defined and bit-mapped as follows:
256
257       CISTPL_CFTABLE_PD_EXISTS      This parameter exists
258
259
260       CISTPL_CFTABLE_PD_MUL10       Multiply return value by 10
261
262
263       CISTPL_CFTABLE_PD_NC_SLEEP    No connection on sleep/power down
264
265
266       CISTPL_CFTABLE_PD_ZERO        Zero value required
267
268
269       CISTPL_CFTABLE_PD_NC          No connection ever
270
271
272
273       The structure members of cistpl_cftable_entry_speed_t are:
274
275         uint32_t    flags;       /* which timing information is present */
276         uint32_t    wait;        /* max WAIT time in device speed format */
277         uint32_t    nS_wait;     /* max WAIT time in nS */
278         uint32_t    rdybsy;      /* max RDY/BSY time in device speed format */
279         uint32_t    nS_rdybsy;   /* max RDY/BSY time in nS */
280         uint32_t    rsvd;        /* max RSVD time in device speed format */
281         uint32_t    nS_rsvd;     /* max RSVD time in nS */
282
283
284
285       The flags field is bit-mapped and defined as follows:
286
287       CISTPL_CFTABLE_TPCE_FS_TD_WAIT
288
289           WAIT timing exists
290
291
292       CISTPL_CFTABLE_TPCE_FS_TD_RDY
293
294           RDY/BSY timing exists
295
296
297       CISTPL_CFTABLE_TPCE_FS_TD_RSVD
298
299           RSVD timing exists
300
301
302
303       The structure members of cistpl_cftable_entry_io_t are:
304
305         uint32_t     flags;        /* direct copy of TPCE_IO byte in tuple */
306         uint32_t     addr_lines;   /* number of decoded I/O address lines */
307         uint32_t     ranges;       /* number of I/O ranges */
308         cistpl_cftable_entry_io_range_t
309                       range[CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES];
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311
312
313       The flags field is defined and bit-mapped as follows:
314
315       CISTPL_CFTABLE_TPCE_FS_IO_BUS
316
317           Bus width mask
318
319
320       CISTPL_CFTABLE_TPCE_FS_IO_BUS8
321
322           8-bit flag
323
324
325       CISTPL_CFTABLE_TPCE_FS_IO_BUS16
326
327           16-bit flag
328
329
330       CISTPL_CFTABLE_TPCE_FS_IO_RANGE
331
332           IO address ranges exist
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334
335
336       The structure members of cistpl_cftable_entry_io_range_t are:
337
338         uint32_t     addr;     /* I/O start address */
339         uint32_t     length;   /* I/O register length */
340
341
342
343       The structure members of cistpl_cftable_entry_irq_t are:
344
345         uint32_t     flags;   /* direct copy of TPCE_IR byte in tuple */
346         uint32_t     irqs;    /* bit mask for each allowed IRQ */
347
348
349
350       The structure members of cistpl_cftable_entry_mem_t are:
351
352         uint32_t     flags;     /* memory descriptor type and host addr info */
353         uint32_t     windows;   /* number of memory space descriptors */
354         cistpl_cftable_entry_mem_window_t
355                  window[CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS];
356
357
358
359       The flags field is defined and bit-mapped as follows:
360
361       CISTPL_CFTABLE_TPCE_FS_MEM3
362
363           Space descriptors
364
365
366       CISTPL_CFTABLE_TPCE_FS_MEM2
367
368           host_addr=card_addr
369
370
371       CISTPL_CFTABLE_TPCE_FS_MEM1
372
373           Card address=0 any host address
374
375
376       CISTPL_CFTABLE_TPCE_FS_MEM_HOST
377
378           If host address is present in MEM3
379
380
381
382       The structure members of cistpl_cftable_entry_mem_window_t are:
383
384         uint32_t     length;     /* length of this window */
385         uint32_t     card_addr;  /* card address */
386         uint32_t     host_addr;  /* host address */
387
388
389
390       The structure members of cistpl_cftable_entry_misc_t are:
391
392         uint32_t     flags;      /* miscellaneous features flags */
393
394
395
396       The flags field is defined and bit-mapped as follows:
397
398       CISTPL_CFTABLE_TPCE_MI_MTC_MASK
399
400           Max twin cards mask
401
402
403       CISTPL_CFTABLE_TPCE_MI_AUDIO
404
405           Audio on BVD2
406
407
408       CISTPL_CFTABLE_TPCE_MI_READONLY
409
410           R/O storage
411
412
413       CISTPL_CFTABLE_TPCE_MI_PWRDOWN
414
415           Powerdown capable
416
417
418       CISTPL_CFTABLE_TPCE_MI_DRQ_MASK
419
420           DMAREQ mask
421
422
423       CISTPL_CFTABLE_TPCE_MI_DRQ_SPK
424
425           DMAREQ on SPKR
426
427
428       CISTPL_CFTABLE_TPCE_MI_DRQ_IOIS
429
430           DMAREQ on IOIS16
431
432
433       CISTPL_CFTABLE_TPCE_MI_DRQ_INP
434
435           DMAREQ on INPACK
436
437
438       CISTPL_CFTABLE_TPCE_MI_DMA_8
439
440           DMA width 8 bits
441
442
443       CISTPL_CFTABLE_TPCE_MI_DMA_16
444
445           DMA width 16 bits
446
447

RETURN VALUES

449       CS_SUCCESS                 Successful operation.
450
451
452       CS_BAD_HANDLE              Client handle is invalid.
453
454
455       CS_UNKNOWN_TUPLE           Parser does not know how to parse tuple.
456
457
458       CS_NO_CARD                 No PC Card in socket.
459
460
461       CS_NO_CIS                  No Card Information Structure  (CIS)  on  PC
462                                  Card.
463
464
465       CS_UNSUPPORTED_FUNCTION    No PCMCIA hardware installed.
466
467

CONTEXT

469       This function may be called from user or kernel context.
470

SEE ALSO

472       csx_GetFirstTuple(9F),    csx_GetTupleData(9F),   csx_Parse_CISTPL_CON‐
473       FIG(9F), csx_RegisterClient(9F), csx_ValidateCIS(9F), tuple(9S)
474
475
476       PC Card 95 Standard, PCMCIA/JEIDA
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479
480SunOS 5.11                        20 Dec 1996csx_Parse_CISTPL_CFTABLE_ENTRY(9F)
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