1Perlilog(3)           User Contributed Perl Documentation          Perlilog(3)
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NAME

6       Perlilog - Verilog environment and IP core handling in Perl
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SYNOPSIS

9         use Perlilog;
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DESCRIPTION

12       The project is extensively documented in Perlilog's user guide, which
13       can be downloaded at the project's home page,
14       <http://www.opencores.org/perlilog/>, or at my own:
15       <http://www.billauer.co.il/perlilog.html>.
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17       In wide terms, Perlilog is a Perl environment for Verilog code
18       manipulation. It supplies the Perl programmer with several strong tools
19       for managing Perl modules and connecting between them.
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21       Originally, Perlilog was intended for integration of Verilog IP cores,
22       but it's useful for the following tasks as well:
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24       ·   Scripts that generate Verilog code automatically
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26       ·   "Hook-up" of modules: Assigning pins, connecting to ASIC pads, etc.
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28       ·   Automatic generation of buses and bus controllers, with a variable
29           number of members and parametrized arbitration rules
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31       ·   Automatic generation of bridges when needed to interface between
32           different bus protocols
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ACKNOWLEDGEMENTS

35       This project would not exist without the warm support of Flextronics
36       Semiconductors in Israel, and Dan Gunders in particular.
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AUTHOR

39       Eli Billauer, <elib@flextronics.co.il>
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SEE ALSO

42       The Perlilog project's home page: <http://www.opencores.org/perlilog/>
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44       The author's home page: <http://www.billauer.co.il/>
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46       The Eobj project: <http://www.billauer.co.il/eobj.html>
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50perl v5.10.1                      2003-11-11                       Perlilog(3)