1EditFiles(3) User Contributed Perl Documentation EditFiles(3)
2
3
4
6 Verilog::EditFiles - Split Verilog modules into separate files.
7
9 See splitmodule command.
10
11 use Verilog::EditFiles;
12 my $split = EditFiles->new(outdir => "processed_rtl",
13 translate_synthesis => 0,
14 lint_header => undef,
15 celldefine => 1,
16 );
17 $split->read_and_split(glob("inbound_rtl/*.v"));
18 $split->write_files();
19 $split->edit_file(filename=>"foo", cb => sub { return $_[0]; });
20
22 Verilog::EditFiles provides a easy way to split library Verilog files
23 that contain multiple modules into many files with one module per file.
24
26 new (...)
27 Create a new Verilog::EditFiles object. Named parameters may be
28 specified:
29
30 celldefine
31 If true, add "`celldefine" before every module statement.
32
33 lint_command
34 For the write_lint method, the name of the linter to use.
35 Defaults to "vlint --brief".
36
37 lint_header
38 If defined, add the provided text before every module
39 statement. Generally used to insert lint off pragmas.
40
41 outdir
42 Name of the directory to write the output modules to. Defaults
43 to ".".
44
45 program
46 Name of the program to add to comments. Defaults to
47 "Verilog::EditFiles".
48
49 timescale_header
50 If defined, add the provided text before every module
51 statement. Generally set to the next needed to #include a
52 timescale file. Use with timescale_removal.
53
54 timescale_removal
55 If set, remove any `timescales.
56
57 translate_synthesis
58 If 1, replace any synopsys translate on/offs with "`ifdef
59 SYNTHESIS" and "`endif"s. If set to a string, use that string
60 instead of "SYNTHESIS".
61
62 v_suffix
63 The suffix to add to convert a module name into a filename.
64 Defaults to ".v".
65
66 verbose
67 If true, print what files are being read and written.
68
69 $self->read_and_split ([filenames])
70 Read from the specified filenames.
71
72 If there is no module statement in the file, assume it is a include
73 file, and when write_files is called, place all of the file
74 contents into the output. If there is a module statement, when
75 write_files is called place all following output into a file named
76 based on the module, with .v added.
77
78 $self->write_files()
79 Write all of the files created by read_and_split to the outdir.
80
81 $self->write_lint([filename=>...])
82 Create a shell script that will lint every file created by
83 write_files. If a "filename" parameter is not provided, "0LINT.sh"
84 will be written in the default outdir.
85
86 $self->edit_file(filename=>..., cb=>sub{...})
87 Read a file, edit it with the provided callback, and save it if it
88 has changed. The "filename" parameter is the filename to read.
89 The "write_filename" parameter is the filename to write, defaulting
90 to the same name as the filename to read. The "cb" parameter is a
91 reference to a callback which takes the string of file contents and
92 returns the string to write back. Often the callback will simply
93 perform a search and replace.
94
96 Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA
97 software tool suite. The latest version is available from CPAN and
98 from http://www.veripool.org/verilog-perl
99 <http://www.veripool.org/verilog-perl>.
100
101 Copyright 2006-2009 by Wilson Snyder. This package is free software;
102 you can redistribute it and/or modify it under the terms of either the
103 GNU Lesser General Public License Version 3 or the Perl Artistic
104 License Version 2.0.
105
107 Wilson Snyder <wsnyder@wsnyder.org>
108
110 Verilog-Perl
111
112
113
114perl v5.12.0 2009-07-20 EditFiles(3)