1LLC(1)                        LLVM Command Guide                        LLC(1)
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NAME

6       llc - LLVM static compiler
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SYNOPSIS

9       llc [options] [filename]
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DESCRIPTION

12       The llc command compiles LLVM source inputs into assembly language for
13       a specified architecture.  The assembly language output can then be
14       passed through a native assembler and linker to generate a native
15       executable.
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17       The choice of architecture for the output assembly code is
18       automatically determined from the input file, unless the -march option
19       is used to override the default.
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OPTIONS

22       If filename is - or omitted, llc reads from standard input.  Otherwise,
23       it will from filename.  Inputs can be in either the LLVM assembly
24       language format (.ll) or the LLVM bitcode format (.bc).
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26       If the -o option is omitted, then llc will send its output to standard
27       output if the input is from standard input.  If the -o option specifies
28       -, then the output will also be sent to standard output.
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30       If no -o option is specified and an input file other than - is
31       specified, then llc creates the output filename by taking the input
32       filename, removing any existing .bc extension, and adding a .s suffix.
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34       Other llc options are as follows:
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36   End-user Options
37       -help
38           Print a summary of command line options.
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40       -O=uint
41           Generate code at different optimization levels. These correspond to
42           the -O0, -O1, -O2, -O3, and -O4 optimization levels used by llvm-
43           gcc and clang.
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45       -mtriple=target triple
46           Override the target triple specified in the input file with the
47           specified string.
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49       -march=arch
50           Specify the architecture for which to generate assembly, overriding
51           the target encoded in the input file.  See the output of llc -help
52           for a list of valid architectures.  By default this is inferred
53           from the target triple or autodetected to the current architecture.
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55       -mcpu=cpuname
56           Specify a specific chip in the current architecture to generate
57           code for.  By default this is inferred from the target triple and
58           autodetected to the current architecture.  For a list of available
59           CPUs, use: llvm-as < /dev/null | llc -march=xyz -mcpu=help
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61       -mattr=a1,+a2,-a3,...
62           Override or control specific attributes of the target, such as
63           whether SIMD operations are enabled or not.  The default set of
64           attributes is set by the current CPU.  For a list of available
65           attributes, use: llvm-as < /dev/null | llc -march=xyz -mattr=help
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67       --disable-fp-elim
68           Disable frame pointer elimination optimization.
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70       --disable-excess-fp-precision
71           Disable optimizations that may produce excess precision for
72           floating point.  Note that this option can dramatically slow down
73           code on some systems (e.g. X86).
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75       --enable-unsafe-fp-math
76           Enable optimizations that make unsafe assumptions about IEEE math
77           (e.g. that addition is associative) or may not work for all input
78           ranges.  These optimizations allow the code generator to make use
79           of some instructions which would otherwise not be usable (such as
80           fsin on X86).
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82       --enable-correct-eh-support
83           Instruct the lowerinvoke pass to insert code for correct exception
84           handling support.  This is expensive and is by default omitted for
85           efficiency.
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87       --stats
88           Print statistics recorded by code-generation passes.
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90       --time-passes
91           Record the amount of time needed for each pass and print a report
92           to standard error.
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94       --load=dso_path
95           Dynamically load dso_path (a path to a dynamically shared object)
96           that implements an LLVM target. This will permit the target name to
97           be used with the -march option so that code can be generated for
98           that target.
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100   Tuning/Configuration Options
101       --print-machineinstrs
102           Print generated machine code between compilation phases (useful for
103           debugging).
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105       --regalloc=allocator
106           Specify the register allocator to use. The default allocator is
107           local.  Valid register allocators are:
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109           simple
110               Very simple "always spill" register allocator
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112           local
113               Local register allocator
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115           linearscan
116               Linear scan global register allocator
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118           iterativescan
119               Iterative scan global register allocator
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121       --spiller=spiller
122           Specify the spiller to use for register allocators that support it.
123           Currently this option is used only by the linear scan register
124           allocator. The default spiller is local.  Valid spillers are:
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126           simple
127               Simple spiller
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129           local
130               Local spiller
131
132   Intel IA-32-specific Options
133       --x86-asm-syntax=att|intel
134           Specify whether to emit assembly code in AT&T syntax (the default)
135           or intel syntax.
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EXIT STATUS

138       If llc succeeds, it will exit with 0.  Otherwise, if an error occurs,
139       it will exit with a non-zero value.
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SEE ALSO

142       lli
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AUTHORS

145       Maintained by the LLVM Team (<http://llvm.org>).
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149CVS                               2010-05-07                            LLC(1)