lotrs(3alc)

1LOTRS(3)               MBK LOGICAL STRUCTURE DEFINITIONS              LOTRS(3)
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NAME

6       lotrs - mbk logical transistor
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DESCRIPTION

9       The  lotrs  is used to describe a logical transistor. It is mostly used
10       to describe leaf cells in terms of transistors interconnections, and as
11       a  result  of  layout  extractions. Since the only target technology is
12       CMOS, only NMOS and PMOS transistors are used.
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14       The declarations needed to work on lotrs are available  in  the  header
15       file "/labo/include/mlo.h".
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17       The following C structure supports the description of the logical tran‐
18       sistor :
19              typedef struct lotrs {
20                 struct lotrs     ∗NEXT;
21                 struct locon     ∗DRAIN;
22                 struct locon     ∗GRID;
23                 struct locon     ∗SOURCE;
24                 struct locon     ∗BULK;
25                 char             ∗TRNAME;
26                 long             X,Y;
27                 unsigned short   WIDTH, LENGTH;
28                 unsigned short   PS, PD;
29                 unsigned short   XS, XD;
30                 char             TYPE;
31                 struct ptype     ∗USER;
32              } lotrs_list;
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34       NEXT                Pointer to the next lotrs of the list.
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36       DRAIN               Pointer to the drain connector of  the  transistor.
37                           This  connector  is, of course unique. See locon(3)
38                           for details.
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40       GRID                Pointer to the grid connector  of  the  transistor.
41                           This  connector  is, of course unique. See locon(3)
42                           for details.
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44       SOURCE              Pointer to the source connector of the  transistor.
45                           This  connector  is, of course unique. See locon(3)
46                           for details.
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48       BULK                Pointer to the bulk connector  of  the  transistor.
49                           This  connector  is, of course unique. See locon(3)
50                           for details.
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52       TRNAME              Transistor instance name
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54       X, Y                Coordinates of the transistor in  a  layout.  These
55                           information   have  sens  only  if  the  transistor
56                           netlist is the result of a layout extraction.  They
57                           are  otherwise  set to zero.  These coordinates are
58                           given in micron times  the  scale  factor  SCALE_X,
59                           since the extracted view is technology dependent.
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61       WIDTH, LENGTH       Respectivly  width  and  length  of  the transistor
62                           grid.
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64       PS, PD              Respectivly perimeter of the source and  drain,  in
65                           micron times the scale factor SCALE_X.
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67       XS, XD              These  values are needed to compute respectivly the
68                           source and drain areas.  Let As be the source  area
69                           in square microns, and Width be the transistor grid
70                           width in micron, then lotrs->XS  =  As  /  Width  *
71                           SCALE_X
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73       TYPE                Canal  type of the transistor. Six legal values are
74                           available :
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76                           TRANSN              N type MOS transistor
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78                           TRANSP              P type MOS transistor
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80                           TRANSN_FAST         High speed N type MOS  transis‐
81                                               tor
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83                           TRANSP_FAST         High  speed P type MOS transis‐
84                                               tor
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86                           TRANSN_HVIO         Low Leakage N type MOS transis‐
87                                               tor
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89                           TRANSP_HVIO         Low Leakage P type MOS transis‐
90                                               tor
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92       USER                Pointer to a ptype list, see ptype(3) for  details,
93                           that  is  a  general  purpose pointer used to share
94                           information on the transistor.
95
96       Remark :            In integrated techniques, NMOS transistor bulk  for
97                           digital  circuits is always set to ground, and PMOS
98                           transistor bulk for digital circuits is always  set
99                           to positive supply.
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NAME

DESCRIPTION

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