1Netlist::Cell(3) User Contributed Perl Documentation Netlist::Cell(3)
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6 Verilog::Netlist::Cell - Instantiated cell within a Verilog Netlist
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9 use Verilog::Netlist;
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11 ...
12 my $cell = $module->find_cell('cellname');
13 print $cell->name;
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16 A Verilog::Netlist::Cell object is created by Verilog::Netlist for
17 every instantiation in the current module.
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20 See also Verilog::Netlist::Subclass for additional accessors and
21 methods.
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23 $self->comment
24 Returns any comments following the definition. keep_comments=>1
25 must be passed to Verilog::Netlist::new for comments to be
26 retained.
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28 $self->delete
29 Delete the cell from the module it's under.
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31 $self->gateprim
32 True if the cell is a gate primitive instantiation (buf/cmos/etc),
33 but not a UDP.
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35 $self->module
36 Pointer to the module the cell is in.
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38 $self->name
39 The instantiation name of the cell.
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41 $self->netlist
42 Reference to the Verilog::Netlist the cell is under.
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44 $self->pins
45 List of Verilog::Netlist::Pin connections for the cell.
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47 $self->pins_sorted
48 List of name sorted Verilog::Netlist::Pin connections for the cell.
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50 $self->range
51 The range for the cell (e.g. "[1:0]") or undef if not ranged.
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53 $self->submod
54 Reference to the Verilog::Netlist::Module the cell instantiates.
55 Only valid after the design is linked.
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57 $self->submodname
58 The module name the cell instantiates (under the cell).
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61 See also Verilog::Netlist::Subclass for additional accessors and
62 methods.
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64 $self->lint
65 Checks the cell for errors. Normally called by
66 Verilog::Netlist::lint.
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68 $self->new_pin
69 Creates a new Verilog::Netlist::Pin connection for this cell.
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71 $self->pins_sorted
72 Returns all Verilog::Netlist::Pin connections for this cell.
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74 $self->dump
75 Prints debugging information for this cell.
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78 Verilog-Perl is part of the <http://www.veripool.org/> free Verilog EDA
79 software tool suite. The latest version is available from CPAN and
80 from <http://www.veripool.org/verilog-perl>.
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82 Copyright 2000-2019 by Wilson Snyder. This package is free software;
83 you can redistribute it and/or modify it under the terms of either the
84 GNU Lesser General Public License Version 3 or the Perl Artistic
85 License Version 2.0.
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88 Wilson Snyder <wsnyder@wsnyder.org>
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91 Verilog-Perl, Verilog::Netlist::Subclass Verilog::Netlist
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95perl v5.28.1 2019-05-04 Netlist::Cell(3)