1LLC(1) LLVM LLC(1)
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6 llc - LLVM static compiler
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9 llc [options] [filename]
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12 The llc command compiles LLVM source inputs into assembly language for
13 a specified architecture. The assembly language output can then be
14 passed through a native assembler and linker to generate a native exe‐
15 cutable.
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17 The choice of architecture for the output assembly code is automati‐
18 cally determined from the input file, unless the -march option is used
19 to override the default.
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22 If filename is "-" or omitted, llc reads from standard input. Other‐
23 wise, it will from filename. Inputs can be in either the LLVM assembly
24 language format (.ll) or the LLVM bitcode format (.bc).
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26 If the -o option is omitted, then llc will send its output to standard
27 output if the input is from standard input. If the -o option specifies
28 "-", then the output will also be sent to standard output.
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30 If no -o option is specified and an input file other than "-" is speci‐
31 fied, then llc creates the output filename by taking the input file‐
32 name, removing any existing .bc extension, and adding a .s suffix.
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34 Other llc options are described below.
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36 End-user Options
37 -help Print a summary of command line options.
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39 -O=uint
40 Generate code at different optimization levels. These corre‐
41 spond to the -O0, -O1, -O2, and -O3 optimization levels used by
42 clang.
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44 -mtriple=<target triple>
45 Override the target triple specified in the input file with the
46 specified string.
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48 -march=<arch>
49 Specify the architecture for which to generate assembly, over‐
50 riding the target encoded in the input file. See the output of
51 llc -help for a list of valid architectures. By default this is
52 inferred from the target triple or autodetected to the current
53 architecture.
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55 -mcpu=<cpuname>
56 Specify a specific chip in the current architecture to generate
57 code for. By default this is inferred from the target triple
58 and autodetected to the current architecture. For a list of
59 available CPUs, use:
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61 llvm-as < /dev/null | llc -march=xyz -mcpu=help
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63 -filetype=<output file type>
64 Specify what kind of output llc should generated. Options are:
65 asm for textual assembly ( '.s'), obj for native object files
66 ('.o') and null for not emitting anything (for performance test‐
67 ing).
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69 Note that not all targets support all options.
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71 -mattr=a1,+a2,-a3,...
72 Override or control specific attributes of the target, such as
73 whether SIMD operations are enabled or not. The default set of
74 attributes is set by the current CPU. For a list of available
75 attributes, use:
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77 llvm-as < /dev/null | llc -march=xyz -mattr=help
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79 --disable-fp-elim
80 Disable frame pointer elimination optimization.
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82 --disable-excess-fp-precision
83 Disable optimizations that may produce excess precision for
84 floating point. Note that this option can dramatically slow
85 down code on some systems (e.g. X86).
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87 --enable-no-infs-fp-math
88 Enable optimizations that assume no Inf values.
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90 --enable-no-nans-fp-math
91 Enable optimizations that assume no NAN values.
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93 --enable-unsafe-fp-math
94 Enable optimizations that make unsafe assumptions about IEEE
95 math (e.g. that addition is associative) or may not work for all
96 input ranges. These optimizations allow the code generator to
97 make use of some instructions which would otherwise not be
98 usable (such as fsin on X86).
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100 --stats
101 Print statistics recorded by code-generation passes.
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103 --time-passes
104 Record the amount of time needed for each pass and print a
105 report to standard error.
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107 --load=<dso_path>
108 Dynamically load dso_path (a path to a dynamically shared
109 object) that implements an LLVM target. This will permit the
110 target name to be used with the -march option so that code can
111 be generated for that target.
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113 -meabi=[default|gnu|4|5]
114 Specify which EABI version should conform to. Valid EABI ver‐
115 sions are gnu, 4 and 5. Default value (default) depends on the
116 triple.
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118 Tuning/Configuration Options
119 --print-machineinstrs
120 Print generated machine code between compilation phases (useful
121 for debugging).
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123 --regalloc=<allocator>
124 Specify the register allocator to use. Valid register alloca‐
125 tors are:
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127 basic
128 Basic register allocator.
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130 fast
131 Fast register allocator. It is the default for unoptimized
132 code.
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134 greedy
135 Greedy register allocator. It is the default for optimized
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138 pbqp
139 Register allocator based on 'Partitioned Boolean Quadratic
140 Programming'.
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142 --spiller=<spiller>
143 Specify the spiller to use for register allocators that support
144 it. Currently this option is used only by the linear scan reg‐
145 ister allocator. The default spiller is local. Valid spillers
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148 simple
149 Simple spiller
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151 local
152 Local spiller
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154 Intel IA-32-specific Options
155 --x86-asm-syntax=[att|intel]
156 Specify whether to emit assembly code in AT&T syntax (the
157 default) or Intel syntax.
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160 If llc succeeds, it will exit with 0. Otherwise, if an error occurs,
161 it will exit with a non-zero value.
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164 lli
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167 Maintained by The LLVM Team (http://llvm.org/).
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170 2003-2020, LLVM Project
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1755 2020-01-29 LLC(1)