syf(1alc)

1SYF(1)                     CAO-VLSI Reference Manual                    SYF(1)
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NAME

6       SYF - Finite State Machine synthesizer.
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ORIGIN

10       This software belongs to the  ALLIANCE CAD SYSTEM developed by the ASIM
11       team at LIP6 laboratory of Université Pierre et Marie CURIE, in  Paris,
12       France.
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14       Web : http://asim.lip6.fr/recherche/alliance/
15       E-mail : alliance-users@asim.lip6.fr
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SYNOPSIS

18       syf -a|j|m|u|o|r [-CDEOPRSTV] input_name [output_name]
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DESCRIPTION

21       syf  is  a Finite State Machine synthesizer.  syf allows a fast genera‐
22       tion of VHDL Data Flow description (see  vbe(5))  from  a  VHDL  Finite
23       State  Machine  description  (see fsm(5)).  The input FSM specification
24       can use an internal STACK.  Both MOORE and MEALEY FSMs can  be  synthe‐
25       sized,  with  output  registers  if  desired.   For a MOORE FSM, a tim‐
26       ing-optimized implementation that emulates a ROM with microsequencer is
27       possible.  A scan-path for the state registers can also be implemented.
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ENVIRONMENT VARIABLES

31       MBK_WORK_LIB[24m(1)
32                 indicates  the  path to the read/write directory for the ses‐
33                 sion.
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OPTIONS

37       -a        Uses "Asp" as encoding algorithm.
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39       -j        Uses "Jedi" as encoding algorithm.
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41       -m        Uses "Mustang" as encoding algorithm.
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43       -u        Uses an encoding given by user through <input_name>.enc file.
44                 In  this  file, a line started by a # character is a comment.
45                 A valid line contains one state name followed by its hexadec‐
46                 imal code.
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48       -o        Uses the one hot encoding algorithm.
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50       -r        Uses distinct random numbers for state encoding.
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52       -C        Checks the transition's consistency.
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54       -D        With this option syf doesn't optimize unused, i.e Don't Care,
55                 codes.
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57       -E        Saves the encoding result  in  the  <output_name>.enc.   This
58                 file  has  the  same syntax as <input_name>.enc file which is
59                 used by -u option.
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61       -O        With this option syf places registers on the outputs.
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63       -P        Implements a scan-path for the state registers, stack  regis‐
64                 ters  and  possibly  output registers. Scan-path mechanism is
65                 directely  included  in  states  decoder.  Users  should  use
66                 scapin(5)  for  a  correct  insertion  of  a  scan-path  in a
67                 netlist.  Please check fsm(5) for information about scan-path
68                 descriptions.
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70       -R        This  option  is  only  available  for  MOORE  FSM. With this
71                 option, syf emulate s a ROM with micro-sequencer  implementa‐
72                 tion : there is no combinatorial logic between the state reg‐
73                 isters and the FSM outputs.  This can be mandatory for exter‐
74                 nal  timing  constraints.  See fsm(5) and grog(1) for more on
75                 ROM descriptions.
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77       -S        With this option syf doesn't take into account  the  cost  of
78                 the transitions to compute an encoding.
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80       -V        Verbose mode on.  Each step of the FSM synthesis is displayed
81                 on the standard output, along with some statistics.
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EXAMPLE

84       Environment variables:
85       setenv MBK_WORK_LIB /alliance/tutorials/dlxm
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87       syf is called  as  follow  (the  dlx_ctrl.fsm  is  already  created  in
88       /alliance/tutorials/dlxm) :
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90       syf -sE dlx_ctrl
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92       Two files will be generated, a states encoding file dlx_ctrls.enc and a
93       VHDL data flow file /alliance/tutorials/dlxm/dlx_ctrls.vbe
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