1COUGAR(1) ALLIANCE USER COMMANDS COUGAR(1)
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6 cougar - Hierarchical netlist extractor
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9 cougar [ -v ] [ -c ] [ -f ] [ -t ] [ -ar ] [ -ac ] input_name [ out‐
10 put_name ]
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14 This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM
15 team at LIP6 laboratory of Université Pierre et Marie CURIE, in Paris,
16 France.
17 Web : http://asim.lip6.fr/recherche/alliance/
19 E-mail : alliance-users@asim.lip6.fr
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22 Lynx changed its name to Cougar during May 2002 in order to avoid name
23 conflict with the famous text-mode Web browser. Cougar is a hierarchi‐
24 cal layout extractor. It builds a netlist of interconnections from a
25 symbolic layout view. The input argument is the name of the symbolic
26 layout cell to be extracted, using as input format the one selected by
27 the MBK_IN_PH(1) environment variable. If output is present, the
28 resulting netlist will be given this name. If no output is given, then
29 input will also be the generated netlist name. The output format is
30 specified by the MBK_OUT_LO(1) environment variable.
31 As most of the Alliance cad tools, cougar uses mbk(1) environment vari‐
32 ables. MBK_CATA_LIB(1), MBK_WORK_LIB(1), MBK_IN_PH(1), MBK_OUT_LO(1),
33 RDS_TECHNO_NAME(1).
34 Cougar computes capacitances attached to the signals if the -ac option
36 is set. At the moment, the value of these capacitances is computed for
37 a typical one micron technology, and cannot be changed by the user
38 through a technology file. The extracted netlist can be simulated for
39 performance evaluation.
40 The typical capacitances are given below in 10e-18 farad / lamda^2 :
41 POLY 100
43 ALU1 50
45 ALU2 25
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49 Cougar checks the two basic ALLIANCE rules regarding connector names:
50 If two physical connectors are connected to the same net, they
51 must have the same name.
52 If two physical connectors have the same name, they must be
53 internally connected to the same net.
54 As a result only one logical connector will appear in the netlist. A
55 fatal error occurs if one of those two rules is violated ( even for
56 power and ground connectors )
57 When no options are specified, the current hierarchical level is
59 extracted. The resulting netlist is the list of interconnections of
60 the current layout hierarchy level. Three options are available to
61 change cougar behaviour :
62 -t Notifies a transistor level extraction, the symbolic layout cell
64 is flattened to transistor layout before extraction.
65 -f The symbolic layout cell is flattened to the catalog level
67 before extraction. Use "man catal" for detail on the catalog
68 file. If the catalog is empty, or doesn't exist, the netlist is
69 an interconection of transistors, if it isn't, the netlist is
70 an interconection of gates or blocks whose names are defined in
71 the catalog.
72 -v Verbose mode on. Each step of the extraction is displayed on
74 the standard output, along with some statistics.
75 -c Generates a core file representing the conflictuel net, when
77 cougar detects two external connectors with different names on
78 the same signal, or when it finds two external connectors having
79 the same name but not internally connected to the same net, or
80 when it cannot correctly extract an L shaped transistor.
81 -ac Extract capacitance to ground on losig.
83 -ar Extract interconnect resistance and capacitance to ground. Value
85 of resistance foreach layer can be changed in the RDS file.
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88 prompt> cougar -v amd2901
89 Gives a logical netlist of the chip amd2901, for one hierarchi‐
90 cal level, using verbose mode. This would be typically used to
91 verify the work of the ring(1) router, in conjunction with lvx
92 on the specificated netlist and the extracted one.
93 prompt> cat $MBK_WORK_LIB/$MBK_CATAL_NAME
95 a2_y
96 a2p_y
97 .
98 .
99 prompt> cougar -f amd2901
100 Gives a logical netlist of the chip amd2901, after a flatten
101 operation stopping on the cells specified in the catalog ( the
102 standard cell library in our case ).
103 prompt> cougar -t amd2901
105 Gives a logical netlist of the amd2901 chip at the transistor
106 level. This is useful with yagle(1), to retrieve logical equa‐
107 tions from a layout.
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110 al(5), MBK_CATA_LIB(1), MBK_WORK_LIB(1), MBK_CATAL_NAME(1),
111 MBK_IN_PH(1), catal(5), RDS_TECHNO_NAME(1).
112ASIM/LIP6 October 1, 1997 COUGAR(1)