1CXL-RESERVE-DPA(1)                                          CXL-RESERVE-DPA(1)
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NAME

6       cxl-reserve-dpa - allocate device-physical address space
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SYNOPSIS

9       cxl reserve-dpa <mem0> [<mem1>..<memN>] [<options>]
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11       The CXL region provisioning process proceeds in multiple steps. One of
12       the steps is identifying and reserving the DPA span that each member of
13       the interleave-set (region) contributes in advance of attaching that
14       allocation to a region. For development, test, and debug purposes this
15       command is a helper to find the next available decoder on endpoint
16       (memdev) and mark a span of DPA as busy.
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OPTIONS

19       <memory device(s)>
20           A memX device name, or a memdev id number. Restrict the operation
21           to the specified memdev(s). The keyword all can be specified to
22           indicate the lack of any restriction.
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24       -S, --serial
25           Rather an a memdev id number, interpret the <memdev> argument(s) as
26           a list of serial numbers.
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28       -b, --bus=
29           Restrict the operation to the specified bus.
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31       -d, --decoder
32           Specify the decoder to attempt the allocation. The CXL
33           specification mandates that allocations must be ordered by DPA and
34           decoder instance. I.e. the lowest DPA allocation on the device is
35           covered by decoder0, and the last / highest DPA allocation is
36           covered by the last decoder. This ordering is enforced by the
37           kernel. By default the tool picks the next available decoder.
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39       -t, --type
40           Select the partition for the allocation. CXL devices implement a
41           partition that divdes ram and pmem capacity, where pmem capacity
42           consumes the higher DPA capacity above the partition boundary. The
43           type defaults to pmem. Note that given CXL DPA allocation
44           constraints, once any pmem allocation is established then all
45           remaining ram capacity becomes reserved (skipped).
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47       -f, --force
48           The kernel enforces CXL DPA allocation ordering constraints, and
49           the tool anticipates those and fails operations that are expected
50           to fail without sending them to the kernel. For test purposes,
51           continue to attempt "expected to fail" operations to exercise the
52           driver.
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54       -s, --size
55           Specify the size of the allocation. This option supports the
56           suffixes "k" or "K" for KiB, "m" or "M" for MiB, "g" or "G" for GiB
57           and "t" or "T" for TiB. This defaults to "all available capacity of
58           the specified type".
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60       -v
61           Turn on verbose debug messages in the library (if libcxl was built
62           with logging and debug enabled).
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65       Copyright © 2016 - 2022, Intel Corporation. License GPLv2: GNU GPL
66       version 2 http://gnu.org/licenses/gpl.html. This is free software: you
67       are free to change and redistribute it. There is NO WARRANTY, to the
68       extent permitted by law.
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SEE ALSO

71       linkcxl:cxl-free-dpa[1]
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75                                  08/03/2023                CXL-RESERVE-DPA(1)
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