1isalist(5) Standards, Environments, and Macros isalist(5)
2
3
4
6 isalist - the native instruction sets known to Solaris software
7
9 The possible instruction set names returned by isalist(1) and the
10 SI_ISALIST command of sysinfo(2) are listed here.
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12
13 The list is ordered within an instruction set family in the sense that
14 later names are generally faster then earlier names; note that this is
15 in the reverse order than listed by isalist(1) and sysinfo(2). In the
16 following list of values, numbered entries generally represent increas‐
17 ing performance; lettered entries are either mutually exclusive or can‐
18 not be ordered.
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20
21 This feature is obsolete and may be removed in a future version of
22 Solaris. The lists below do not reflect all the extensions that have
23 been made by modern processors. See getisax(2) for a better way to han‐
24 dle instruction set extensions.
25
26 SPARC Platforms
27 Where appropriate, correspondence with a given value of the -xarch
28 option of Sun's C 4.0 compiler is indicated. Other compilers might have
29 similar options.
30
31 1a. sparc Indicates the SPARC V8 instruction set, as
32 defined in The SPARC Architecture Manual,
33 Version 8, Prentice-Hall, Inc., 1992. Some
34 instructions (such as integer multiply and
35 divide, FSMULD, and all floating point oper‐
36 ations on quad operands) can be emulated by
37 the kernel on certain systems.
38
39
40 1b. sparcv7 Same as sparc. This corresponds to code pro‐
41 duced with the -xarch=v7 option of Sun's C
42 4.0 compiler.
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44
45 2. sparcv8-fsmuld Like sparc, except that integer multiply and
46 divide must be executed in hardware. This
47 corresponds to code produced with the
48 -xarch=v8a option of Sun's C 4.0 compiler.
49
50
51 3. sparcv8 Like sparcv8-fsmuld, except that FSMULD must
52 also be executed in hardware. This corre‐
53 sponds to code produced with the -xarch=v8
54 option of Sun's C 4.0 compiler.
55
56
57 4. sparcv8plus Indicates the SPARC V8 instruction set plus
58 those instructions in the SPARC V9 instruc‐
59 tion set, as defined in The SPARC Architec‐
60 ture Manual, Version 9, Prentice-Hall, 1994,
61 that can be used according to The V8+ Tech‐
62 nical Specification. This corresponds to
63 code produced with the -xarch=v8plus option
64 of Sun's C 4.0 compiler.
65
66
67 5a. sparcv8plus+vis Like sparcv8plus, with the addition of those
68 UltraSPARC I Visualization Instructions that
69 can be used according to The V8+ Technical
70 Specification. This corresponds to code pro‐
71 duced with the -xarch=v8plusa option of
72 Sun's C 4.0 compiler.
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74
75 5b. sparcv8plus+fmuladd Like sparcv8plus, with the addition of the
76 Fujitsu SPARC64 floating multiply-add and
77 multiply-subtract instructions.
78
79
80 6. sparcv9 Indicates the SPARC V9 instruction set, as
81 defined in The SPARC Architecture Manual,
82 Version 9, Prentice-Hall, 1994.
83
84
85 7a. sparcv9+vis Like sparcv9, with the addition of the
86 UltraSPARC I Visualization Instructions.
87
88
89 7b. sparcv9+vis2 Like sparcv9, with the addition of the
90 UltraSPARC III Visualization Instructions.
91
92
93 7c. sparcv9+fmuladd Like sparcv9, with the addition of the
94 Fujitsu SPARC64 floating multiply-add and
95 multiply-subtract instructions.
96
97
98 x86 Platforms
99 1. i386 The Intel 80386 instruction set, as described in
100 The i386 Microprocessor Programmer's Reference
101 Manual.
102
103
104 2. i486 The Intel 80486 instruction set, as described in
105 The i486 Microprocessor Programmer's Reference
106 Manual. (This is effectively i386, plus the CMPX‐
107 CHG, BSWAP, and XADD instructions.)
108
109
110 3. pentium The Intel Pentium instruction set, as described
111 in The Pentium Processor User's Manual. (This is
112 effectively i486, plus the CPU_ID instruction,
113 and any features that the CPU_ID instruction
114 indicates are present.)
115
116
117 4. pentium+mmx Like pentium, with the MMX instructions guaran‐
118 teed present.
119
120
121 5. pentium_pro The Intel PentiumPro instruction set, as
122 described in The PentiumPro Family Developer's
123 Manual. (This is effectively pentium, with the
124 CMOVcc, FCMOVcc, FCOMI, and RDPMC instructions
125 guaranteed present.)
126
127
128 6. pentium_pro+mmx Like pentium_pro, with the MMX instructions guar‐
129 anteed present.
130
131
132 7. amd64 The AMD Opteron instruction set, as described in
133 the AMD64 Architecture Programmer's Manual.
134
135
137 isalist(1), getisax(2), sysinfo(2)
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141SunOS 5.11 20 Mar 2008 isalist(5)