1TURBOSTAT(8) System Manager's Manual TURBOSTAT(8)
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6 turbostat - Report processor frequency and idle statistics
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9 turbostat [Options] command
10 turbostat [Options] [--interval seconds]
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13 turbostat reports processor topology, frequency, idle power-state sta‐
14 tistics, temperature and power on modern X86 processors. Either com‐
15 mand is forked and statistics are printed upon its completion, or sta‐
16 tistics are printed periodically.
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18 command, which is forked and statistics are printed upon its comple‐
19 tion. The second method is to omit the command, and turbostat displays
20 statistics every 5 seconds. The 5-second interval can be changed using
21 the --interval option.
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23 turbostat must be run on root, and minimally requires that the proces‐
24 sor supports an "invariant" TSC, plus the APERF and MPERF MSRs. Addi‐
25 tional information is reported depending on hardware counter support.
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28 Options
29 --Counter MSR# shows the delta of the specified 64-bit MSR counter.
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31 --counter MSR# shows the delta of the specified 32-bit MSR counter.
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33 --Dump displays the raw counter values.
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35 --debug displays additional system configuration information. Invoking
36 this parameter more than once may also enable internal turbostat debug
37 information.
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39 --interval seconds overrides the default 5-second measurement interval.
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41 --help displays usage for the most common parameters.
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43 --Joules displays energy in Joules, rather than dividing Joules by time
44 to print power in Watts.
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46 --MSR MSR# shows the specified 64-bit MSR value.
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48 --msr MSR# shows the specified 32-bit MSR value.
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50 --Package limits output to the system summary plus the 1st thread in
51 each Package.
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53 --processor limits output to the system summary plus the 1st thread in
54 each processor of each package. Ie. it skips hyper-threaded siblings.
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56 --Summary limits output to a 1-line System Summary for each interval.
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58 --TCC temperature sets the Thermal Control Circuit temperature for sys‐
59 tems which do not export that value. This is used for making sense of
60 the Digital Thermal Sensor outputs, as they return degrees Celsius
61 below the TCC activation temperature.
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63 --version displays the version.
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65 The command parameter forks command, and upon its exit, displays the
66 statistics gathered since it was forked.
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69 Package processor package number.
70 Core processor core number.
71 CPU Linux CPU (logical processor) number.
72 Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
73 AVG_MHz number of cycles executed divided by time elapsed.
74 %Busy percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
75 Bzy_MHz average clock rate while the CPU was busy (in "c0" state).
76 TSC_MHz average MHz that the TSC ran during the entire interval.
77 CPU%c1, CPU%c3, CPU%c6, CPU%c7 show the percentage residency in hardware core idle states.
78 CoreTmp Degrees Celsius reported by the per-core Digital Thermal Sensor.
79 PkgTtmp Degrees Celsius reported by the per-package Package Thermal Monitor.
80 Pkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7 percentage residency in hardware package idle states.
81 PkgWatt Watts consumed by the whole package.
82 CorWatt Watts consumed by the core part of the package.
83 GFXWatt Watts consumed by the Graphics part of the package -- available only on client processors.
84 RAMWatt Watts consumed by the DRAM DIMMS -- available only on server processors.
85 PKG_% percent of the interval that RAPL throttling was active on the Package.
86 RAM_% percent of the interval that RAPL throttling was active on DRAM.
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89 Without any parameters, turbostat displays statistics ever 5 seconds.
90 (override interval with "-i sec" option, or specify a command for tur‐
91 bostat to fork).
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93 The first row of statistics is a summary for the entire system. For
94 residency % columns, the summary is a weighted average. For Tempera‐
95 ture columns, the summary is the column maximum. For Watts columns,
96 the summary is a system total. Subsequent rows show per-CPU statis‐
97 tics.
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99 [root@ivy]# ./turbostat
100 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
101 - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
102 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
103 0 4 1 0.07 1596 3492 0 0.79
104 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
105 1 5 5 0.28 1596 3492 0 0.95
106 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
107 2 6 2 0.10 1597 3492 0 0.97
108 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
109 3 7 5 0.31 1596 3492 0 0.33
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112 The "--debug" option prints additional system information before mea‐
113 surements:
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115 turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org>
116 CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
117 CPUID(6): APERF, DTS, PTM, EPB
118 RAPL: 851 sec. Joule Counter Range, at 77 Watts
119 cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
120 16 * 100 = 1600 MHz max efficiency
121 35 * 100 = 3500 MHz TSC frequency
122 cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled)
123 cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n)
124 cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
125 37 * 100 = 3700 MHz max turbo 4 active cores
126 38 * 100 = 3800 MHz max turbo 3 active cores
127 39 * 100 = 3900 MHz max turbo 2 active cores
128 39 * 100 = 3900 MHz max turbo 1 active cores
129 cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
130 cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
131 cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
132 cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked)
133 cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
134 cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
135 cpu0: MSR_PP0_POLICY: 0
136 cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
137 cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
138 cpu0: MSR_PP1_POLICY: 0
139 cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
140 cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
141 cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
142 cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
143 cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1)
144 cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1)
145 cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1)
146 cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
147 ...
148 The max efficiency frequency, a.k.a. Low Frequency Mode, is the fre‐
149 quency available at the minimum package voltage. The TSC frequency is
150 the nominal maximum frequency of the processor if turbo-mode were not
151 available. This frequency should be sustainable on all CPUs indefi‐
152 nitely, given nominal power and cooling. The remaining rows show what
153 maximum turbo frequency is possible depending on the number of idle
154 cores. Note that this information is not available on all processors.
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157 If turbostat is invoked with a command, it will fork that command and
158 output the statistics gathered when the command exits. eg. Here a
159 cycle soaker is run on 1 CPU (see %c0) for a few seconds until ^C while
160 the other CPUs are mostly idle:
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162 root@ivy: turbostat cat /dev/zero > /dev/null
163 ^C
164 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
165 - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
166 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
167 0 4 9 0.24 3829 3492 0 1.15
168 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
169 1 5 3880 99.82 3888 3492 0 0.18
170 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
171 2 6 12 0.32 3823 3492 0 0.89
172 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
173 3 7 4 0.11 3827 3492 0 0.94
174 30.372243 sec
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176 Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit while the
177 other processors are generally in various states of idle.
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179 Note that cpu1 and cpu5 are HT siblings within core1. As cpu5 is very
180 busy, it prevents its sibling, cpu1, from entering a c-state deeper
181 than c1.
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183 Note that the Avg_MHz column reflects the total number of cycles exe‐
184 cuted divided by the measurement interval. If the %Busy column is
185 100%, then the processor was running at that speed the entire interval.
186 The Avg_MHz multiplied by the %Busy results in the Bzy_MHz -- which is
187 the average frequency while the processor was executing -- not includ‐
188 ing any non-busy idle time.
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190
192 AVG_MHz = APERF_delta/measurement_interval. This is the actual number
193 of elapsed cycles divided by the entire sample interval -- including
194 idle time. Note that this calculation is resilient to systems lacking
195 a non-stop TSC.
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197 turbostat must be run as root.
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199 turbostat reads hardware counters, but doesn't write them. So it will
200 not interfere with the OS or other programs, including multiple invoca‐
201 tions of itself.
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203 turbostat may work poorly on Linux-2.6.20 through 2.6.29, as acpi-
204 cpufreq periodically cleared the APERF and MPERF in those kernels.
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206 If the TSC column does not make sense, then the other numbers will also
207 make no sense. Turbostat is lightweight, and its data collection is
208 not atomic. These issues are usually caused by an extremely short mea‐
209 surement interval (much less than 1 second), or system activity that
210 prevents turbostat from being able to run on all CPUS to quickly col‐
211 lect data.
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213 The APERF, MPERF MSRs are defined to count non-halted cycles. Although
214 it is not guaranteed by the architecture, turbostat assumes that they
215 count at TSC rate, which is true on all processors tested to date.
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219 Volume 3B: System Programming Guide" http://www.intel.com/products/pro‐
220 cessor/manuals/
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224 /dev/cpu/*/msr
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228 msr(4), vmstat(8)
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231 Written by Len Brown <len.brown@intel.com>
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235 TURBOSTAT(8)