1STRUCT NAND_CHIP(9) Structures STRUCT NAND_CHIP(9)
2
6 struct_nand_chip - NAND Private Flash Chip Data
7
9 struct nand_chip {
10 void __iomem * IO_ADDR_R;
11 void __iomem * IO_ADDR_W;
12 uint8_t (* read_byte) (struct mtd_info *mtd);
13 u16 (* read_word) (struct mtd_info *mtd);
14 void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
15 void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len);
16 int (* verify_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
17 void (* select_chip) (struct mtd_info *mtd, int chip);
18 int (* block_bad) (struct mtd_info *mtd, loff_t ofs, int getchip);
19 int (* block_markbad) (struct mtd_info *mtd, loff_t ofs);
20 void (* cmd_ctrl) (struct mtd_info *mtd, int dat,unsigned int ctrl);
21 int (* dev_ready) (struct mtd_info *mtd);
22 void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column, int page_addr);
23 int (* waitfunc) (struct mtd_info *mtd, struct nand_chip *this);
24 void (* erase_cmd) (struct mtd_info *mtd, int page);
25 int (* scan_bbt) (struct mtd_info *mtd);
26 int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
27 int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,const uint8_t *buf, int page, int cached, int raw);
28 int chip_delay;
29 unsigned int options;
30 int page_shift;
31 int phys_erase_shift;
32 int bbt_erase_shift;
33 int chip_shift;
34 int numchips;
35 uint64_t chipsize;
36 int pagemask;
37 int pagebuf;
38 int subpagesize;
39 uint8_t cellinfo;
40 int badblockpos;
41 nand_state_t state;
42 uint8_t * oob_poi;
43 struct nand_hw_control * controller;
44 struct nand_ecclayout * ecclayout;
45 struct nand_ecc_ctrl ecc;
46 struct nand_buffers * buffers;
47 struct nand_hw_control hwcontrol;
48 struct mtd_oob_ops ops;
49 uint8_t * bbt;
50 struct nand_bbt_descr * bbt_td;
51 struct nand_bbt_descr * bbt_md;
52 struct nand_bbt_descr * badblock_pattern;
53 void * priv;
54 };
55
57 IO_ADDR_R
58 [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
59 IO_ADDR_W
61 [BOARDSPECIFIC] address to write the 8 I/O lines of the flash
62 device
63 read_byte
65 [REPLACEABLE] read one byte from the chip
66 read_word
68 [REPLACEABLE] read one word from the chip
69 write_buf
71 [REPLACEABLE] write data from the buffer to the chip
72 read_buf
74 [REPLACEABLE] read data from the chip into the buffer
75 verify_buf
77 [REPLACEABLE] verify buffer contents against the chip data
78 select_chip
80 [REPLACEABLE] select chip nr
81 block_bad
83 [REPLACEABLE] check, if the block is bad
84 block_markbad
86 [REPLACEABLE] mark the block bad
87 cmd_ctrl
89 [BOARDSPECIFIC] hardwarespecific funtion for controlling
90 ALE/CLE/nCE. Also used to write command and address
91 dev_ready
93 [BOARDSPECIFIC] hardwarespecific function for accesing device
94 ready/busy line If set to NULL no access to ready/busy is available
95 and the ready/busy information is read from the chip status
96 register
97 cmdfunc
99 [REPLACEABLE] hardwarespecific function for writing commands to the
100 chip
101 waitfunc
103 [REPLACEABLE] hardwarespecific function for wait on ready
104 erase_cmd
106 [INTERN] erase command write function, selectable due to AND
107 support
108 scan_bbt
110 [REPLACEABLE] function to scan bad block table
111 errstat
113 [OPTIONAL] hardware specific function to perform additional error
114 status checks (determine if errors are correctable)
115 write_page
117 [REPLACEABLE] High-level page write function
118 chip_delay
120 [BOARDSPECIFIC] chip dependent delay for transfering data from
121 array to read regs (tR)
122 options
124 [BOARDSPECIFIC] various chip options. They can partly be set to
125 inform nand_scan about special functionality. See the defines for
126 further explanation
127 page_shift
129 [INTERN] number of address bits in a page (column address bits)
130 phys_erase_shift
132 [INTERN] number of address bits in a physical eraseblock
133 bbt_erase_shift
135 [INTERN] number of address bits in a bbt entry
136 chip_shift
138 [INTERN] number of address bits in one chip
139 numchips
141 [INTERN] number of physical chips
142 chipsize
144 [INTERN] the size of one chip for multichip arrays
145 pagemask
147 [INTERN] page number mask = number of (pages / chip) - 1
148 pagebuf
150 [INTERN] holds the pagenumber which is currently in data_buf
151 subpagesize
153 [INTERN] holds the subpagesize
154 cellinfo
156 [INTERN] MLC/multichip data from chip ident
157 badblockpos
159 [INTERN] position of the bad block marker in the oob area
160 state
162 [INTERN] the current state of the NAND device
163 oob_poi
165 poison value buffer
166 controller
168 [REPLACEABLE] a pointer to a hardware controller structure which is
169 shared among multiple independend devices
170 ecclayout
172 [REPLACEABLE] the default ecc placement scheme
173 ecc
175 [BOARDSPECIFIC] ecc control ctructure
176 buffers
178 buffer structure for read/write
179 hwcontrol
181 platform-specific hardware control structure
182 ops
184 oob operation operands
185 bbt
187 [INTERN] bad block table pointer
188 bbt_td
190 [REPLACEABLE] bad block table descriptor for flash lookup
191 bbt_md
193 [REPLACEABLE] bad block table mirror descriptor
194 badblock_pattern
196 [REPLACEABLE] bad block scan pattern used for initial bad block
197 scan
198 priv
200 [OPTIONAL] pointer to private chip date
201
203 Thomas Gleixner <tglx@linutronix.de>
204 Author.
205
207Kernel Hackers Manual 2.6. June 2019 STRUCT NAND_CHIP(9)