1VERILATOR(1) User Contributed Perl Documentation VERILATOR(1)
2
6 Verilator - Translate and simulate SystemVerilog code using C++/SystemC
7
9 verilator --help
10 verilator --version
11 verilator --cc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so]
12 verilator --sc [options] [source_files.v]... [opt_c_files.cpp/c/cc/a/o/so]
13 verilator --lint-only -Wall [source_files.v]...
14
16 The "Verilator" package converts all synthesizable, and many
17 behavioral, Verilog and SystemVerilog designs into a C++ or SystemC
18 model that after compiling can be executed. Verilator is not a
19 traditional simulator, but a compiler.
20 For documentation see <https://verilator.org/verilator_doc.html>.
22
24 This is a short summary of the arguments to the "verilator" executable.
25 See <https://verilator.org/guide/latest/exe_verilator.html> for the
26 detailed descriptions of these arguments.
27 <file.v> Verilog package, module and top module filenames
29 <file.c/cc/cpp> Optional C++ files to compile in
30 <file.a/o/so> Optional C++ files to link in
31 +1364-1995ext+<ext> Use Verilog 1995 with file extension <ext>
33 +1364-2001ext+<ext> Use Verilog 2001 with file extension <ext>
34 +1364-2005ext+<ext> Use Verilog 2005 with file extension <ext>
35 +1800-2005ext+<ext> Use SystemVerilog 2005 with file extension <ext>
36 +1800-2009ext+<ext> Use SystemVerilog 2009 with file extension <ext>
37 +1800-2012ext+<ext> Use SystemVerilog 2012 with file extension <ext>
38 +1800-2017ext+<ext> Use SystemVerilog 2017 with file extension <ext>
39 --assert Enable all assertions
40 --autoflush Flush streams after all $displays
41 --bbox-sys Blackbox unknown $system calls
42 --bbox-unsup Blackbox unsupported language features
43 --bin <filename> Override Verilator binary
44 --build Build model executable/library after Verilation
45 --cc Create C++ output
46 --cdc Clock domain crossing analysis
47 -CFLAGS <flags> C++ compiler arguments for makefile
48 --clk <signal-name> Mark specified signal as clock
49 --no-clk <signal-name> Prevent marking specified signal as clock
50 --compiler <compiler-name> Tune for specified C++ compiler
51 --converge-limit <loops> Tune convergence settle time
52 --coverage Enable all coverage
53 --coverage-line Enable line coverage
54 --coverage-max-width <width> Maximum array depth for coverage
55 --coverage-toggle Enable toggle coverage
56 --coverage-underscore Enable coverage of _signals
57 --coverage-user Enable SVL user coverage
58 -D<var>[=<value>] Set preprocessor define
59 --debug Enable debugging
60 --debug-check Enable debugging assertions
61 --no-debug-leak Disable leaking memory in --debug mode
62 --debugi <level> Enable debugging at a specified level
63 --debugi-<srcfile> <level> Enable debugging a source file at a level
64 --no-decoration Disable comments and symbol decorations
65 --default-language <lang> Default language to parse
66 +define+<var>=<value> Set preprocessor define
67 --dpi-hdr-only Only produce the DPI header file
68 --dump-defines Show preprocessor defines with -E
69 --dump-tree Enable dumping .tree files
70 --dump-tree-addrids Use short identifiers instead of addresses
71 --dump-treei <level> Enable dumping .tree files at a level
72 --dump-treei-<srcfile> <level> Enable dumping .tree file at a source file at a level
73 -E Preprocess, but do not compile
74 --error-limit <value> Abort after this number of errors
75 --exe Link to create executable
76 --expand-limit <value> Set expand optimization limit
77 -F <file> Parse arguments from a file, relatively
78 -f <file> Parse arguments from a file
79 -FI <file> Force include of a file
80 --flatten Force inlining of all modules, tasks and functions
81 -fno-<optimization> Disable internal optimization stage
82 -G<name>=<value> Overwrite top-level parameter
83 --gate-stmts <value> Tune gate optimizer depth
84 --gdb Run Verilator under GDB interactively
85 --gdbbt Run Verilator under GDB for backtrace
86 --generate-key Create random key for --protect-key
87 --getenv <var> Get environment variable with defaults
88 --help Display this help
89 --hierarchical Enable hierarchical Verilation
90 -I<dir> Directory to search for includes
91 --if-depth <value> Tune IFDEPTH warning
92 +incdir+<dir> Directory to search for includes
93 --inline-mult <value> Tune module inlining
94 --instr-count-dpi <value> Assumed dynamic instruction count of DPI imports
95 -j <jobs> Parallelism for --build
96 --l2-name <value> Verilog scope name of the top module
97 --language <lang> Default language standard to parse
98 -LDFLAGS <flags> Linker pre-object arguments for makefile
99 --lib-create <name> Create a DPI library
100 +libext+<ext>+[ext]... Extensions for finding modules
101 --lint-only Lint, but do not make output
102 --make <build-tool> Generate scripts for specified build tool
103 -MAKEFLAGS <flags> Arguments to pass to make during --build
104 --max-num-width <value> Maximum number width (default: 64K)
105 --Mdir <directory> Name of output object directory
106 --MMD Create .d dependency files
107 --mod-prefix <topname> Name to prepend to lower classes
108 --MP Create phony dependency targets
109 +notimingchecks Ignored
110 -O0 Disable optimizations
111 -O3 High performance optimizations
112 -O<optimization-letter> Selectable optimizations
113 -o <executable> Name of final executable
114 --no-order-clock-delay Disable ordering clock enable assignments
115 --output-split <statements> Split .cpp files into pieces
116 --output-split-cfuncs <statements> Split model functions
117 --output-split-ctrace <statements> Split tracing functions
118 -P Disable line numbers and blanks with -E
119 --pins-bv <bits> Specify types for top level ports
120 --pins-sc-biguint Specify types for top level ports
121 --pins-sc-uint Specify types for top level ports
122 --pins-uint8 Specify types for top level ports
123 --no-pins64 Don't use uint64_t's for 33-64 bit sigs
124 --pipe-filter <command> Filter all input through a script
125 --pp-comments Show preprocessor comments with -E
126 --prefix <topname> Name of top level class
127 --private Debugging; see docs
128 --prof-c Compile C++ code with profiling
129 --prof-cfuncs Name functions for profiling
130 --prof-exec Enable generating execution profile for gantt chart
131 --prof-pgo Enable generating profiling data for PGO
132 --protect-ids Hash identifier names for obscurity
133 --protect-key <key> Key for symbol protection
134 --protect-lib <name> Create a DPI protected library
135 --public Debugging; see docs
136 --public-flat-rw Mark all variables, etc as public_flat_rw
137 -pvalue+<name>=<value> Overwrite toplevel parameter
138 --quiet-exit Don't print the command on failure
139 --relative-includes Resolve includes relative to current file
140 --reloop-limit Minimum iterations for forming loops
141 --report-unoptflat Extra diagnostics for UNOPTFLAT
142 --rr Run Verilator and record with rr
143 --savable Enable model save-restore
144 --sc Create SystemC output
145 --no-skip-identical Disable skipping identical output
146 --stats Create statistics file
147 --stats-vars Provide statistics on variables
148 -sv Enable SystemVerilog parsing
149 +systemverilogext+<ext> Synonym for +1800-2017ext+<ext>
150 --threads <threads> Enable multithreading
151 --threads-dpi <mode> Enable multithreaded DPI
152 --threads-max-mtasks <mtasks> Tune maximum mtask partitioning
153 --timescale <timescale> Sets default timescale
154 --timescale-override <timescale> Overrides all timescales
155 --top <topname> Alias of --top-module
156 --top-module <topname> Name of top level input module
157 --trace Enable waveform creation
158 --trace-coverage Enable tracing of coverage
159 --trace-depth <levels> Depth of tracing
160 --trace-fst Enable FST waveform creation
161 --trace-max-array <depth> Maximum bit width for tracing
162 --trace-max-width <width> Maximum array depth for tracing
163 --trace-params Enable tracing of parameters
164 --trace-structs Enable tracing structure names
165 --trace-threads <threads> Enable FST waveform creation on separate threads
166 --trace-underscore Enable tracing of _signals
167 -U<var> Undefine preprocessor define
168 --unroll-count <loops> Tune maximum loop iterations
169 --unroll-stmts <stmts> Tune maximum loop body size
170 --unused-regexp <regexp> Tune UNUSED lint signals
171 -V Verbose version and config
172 -v <filename> Verilog library
173 --no-verilate Skip verilation and just compile previously Verilated code.
174 +verilog1995ext+<ext> Synonym for +1364-1995ext+<ext>
175 +verilog2001ext+<ext> Synonym for +1364-2001ext+<ext>
176 --version Displays program version and exits
177 --vpi Enable VPI compiles
178 --waiver-output <filename> Create a waiver file based on the linter warnings
179 -Wall Enable all style warnings
180 -Werror-<message> Convert warnings to errors
181 -Wfuture-<message> Disable unknown message warnings
182 -Wno-<message> Disable warning
183 -Wno-context Disable source context on warnings
184 -Wno-fatal Disable fatal exit on warnings
185 -Wno-lint Disable all lint warnings
186 -Wno-style Disable all style warnings
187 -Wpedantic Warn on compliance-test issues
188 -Wwarn-<message> Enable specified warning message
189 -Wwarn-lint Enable lint warning message
190 -Wwarn-style Enable style warning message
191 --x-assign <mode> Assign non-initial Xs to this value
192 --x-initial <mode> Assign initial Xs to this value
193 --x-initial-edge Enable initial X->0 and X->1 edge triggers
194 --xml-only Create XML parser output
195 --xml-output XML output filename
196 -y <dir> Directory to search for modules
197 This is a short summary of the simulation runtime arguments, i.e. for
199 the final Verilated simulation runtime models. See
200 <https://verilator.org/guide/latest/exe_verilator.html> for the
201 detailed description of these arguments.
202 +verilator+debug Enable debugging
204 +verilator+debugi+<value> Enable debugging at a level
205 +verilator+error+limit+<value> Set error limit
206 +verilator+help Display help
207 +verilator+noassert Disable assert checking
208 +verilator+prof+exec+file+<filename> Set execution profile filename
209 +verilator+prof+exec+start+<value> Set execution profile starting point
210 +verilator+prof+exec+window+<value> Set execution profile duration
211 +verilator+prof+vlt+file+<filename> Set PGO profile filename
212 +verilator+rand+reset+<value> Set random reset technique
213 +verilator+seed+<value> Set random seed
214 +verilator+V Verbose version and config
215 +verilator+version Show version and exit
216
218 The latest version is available from <https://verilator.org>.
219 Copyright 2003-2022 by Wilson Snyder. This program is free software;
221 you can redistribute it and/or modify the Verilator internals under the
222 terms of either the GNU Lesser General Public License Version 3 or the
223 Perl Artistic License Version 2.0.
224 All Verilog and C++/SystemC code quoted within this documentation file
226 are released as Creative Commons Public Domain (CC0). Many example
227 files and test files are likewise released under CC0 into effectively
228 the Public Domain as described in the files themselves.
229
231 verilator_coverage, verilator_gantt, verilator_profcfunc, make,
232 "verilator --help" which is the source for this document,
234 and <https://verilator.org/verilator_doc.html> for detailed
236 documentation.
237perl v5.36.0 2022-09-24 VERILATOR(1)