1AS(1) GNU Development Tools AS(1)
2
6 AS - the portable GNU assembler.
7
9 as [-a[cdghlns][=file]] [--alternate] [-D]
10 [--debug-prefix-map old=new]
11 [--defsym sym=val] [-f] [-g] [--gstabs]
12 [--gstabs+] [--gdwarf-2] [--help] [-I dir] [-J]
13 [-K] [-L] [--listing-lhs-width=NUM]
14 [--listing-lhs-width2=NUM] [--listing-rhs-width=NUM]
15 [--listing-cont-lines=NUM] [--keep-locals] [-o
16 objfile] [-R] [--reduce-memory-overheads] [--statistics]
17 [-v] [-version] [--version] [-W] [--warn]
18 [--fatal-warnings] [-w] [-x] [-Z] [@FILE]
19 [--target-help] [target-options]
20 [--|files ...]
21 Target Alpha options:
23 [-mcpu]
24 [-mdebug | -no-mdebug]
25 [-replace | -noreplace]
26 [-relax] [-g] [-Gsize]
27 [-F] [-32addr]
28 Target ARC options:
30 [-marc[5|6|7|8]]
31 [-EB|-EL]
32 Target ARM options:
34 [-mcpu=processor[+extension...]]
35 [-march=architecture[+extension...]]
36 [-mfpu=floating-point-format]
37 [-mfloat-abi=abi]
38 [-meabi=ver]
39 [-mthumb]
40 [-EB|-EL]
41 [-mapcs-32|-mapcs-26|-mapcs-float|
42 -mapcs-reentrant]
43 [-mthumb-interwork] [-k]
44 Target Blackfin options:
46 [-mcpu=processor[-sirevision]]
47 [-mfdpic]
48 [-mno-fdpic]
49 [-mnopic]
50 Target CRIS options:
52 [--underscore | --no-underscore]
53 [--pic] [-N]
54 [--emulation=criself | --emulation=crisaout]
55 [--march=v0_v10 | --march=v10 | --march=v32 |
56 --march=common_v10_v32]
57 Target D10V options:
59 [-O]
60 Target D30V options:
62 [-O|-n|-N]
63 Target H8/300 options:
65 [-h-tick-hex]
66 Target i386 options:
68 [--32|--64] [-n]
69 [-march=CPU[+EXTENSION...]] [-mtune=CPU]
70 Target i960 options:
72 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
73 -AKC|-AMC]
74 [-b] [-no-relax]
75 Target IA-64 options:
77 [-mconstant-gp|-mauto-pic]
78 [-milp32|-milp64|-mlp64|-mp64]
79 [-mle|mbe]
80 [-mtune=itanium1|-mtune=itanium2]
81 [-munwind-check=warning|-munwind-check=error]
82 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
83 [-x|-xexplicit] [-xauto] [-xdebug]
84 Target IP2K options:
86 [-mip2022|-mip2022ext]
87 Target M32C options:
89 [-m32c|-m16c] [-relax] [-h-tick-hex]
90 Target M32R options:
92 [--m32rx|--[no-]warn-explicit-parallel-conflicts|
93 --W[n]p]
94 Target M680X0 options:
96 [-l] [-m68000|-m68010|-m68020|...]
97 Target M68HC11 options:
99 [-m68hc11|-m68hc12|-m68hcs12]
100 [-mshort|-mlong]
101 [-mshort-double|-mlong-double]
102 [--force-long-branches] [--short-branches]
103 [--strict-direct-mode] [--print-insn-syntax]
104 [--print-opcodes] [--generate-example]
105 Target MCORE options:
107 [-jsri2bsr] [-sifilter] [-relax]
108 [-mcpu=[210|340]] Target MICROBLAZE options:
109 Target MIPS options:
111 [-nocpp] [-EL] [-EB] [-O[optimization level]]
112 [-g[debug level]] [-G num] [-KPIC] [-call_shared]
113 [-non_shared] [-xgot [-mvxworks-pic]
114 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
115 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
116 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
117 [-mips64] [-mips64r2]
118 [-construct-floats] [-no-construct-floats]
119 [-trap] [-no-break] [-break] [-no-trap]
120 [-mips16] [-no-mips16]
121 [-msmartmips] [-mno-smartmips]
122 [-mips3d] [-no-mips3d]
123 [-mdmx] [-no-mdmx]
124 [-mdsp] [-mno-dsp]
125 [-mdspr2] [-mno-dspr2]
126 [-mmt] [-mno-mt]
127 [-mfix7000] [-mno-fix7000]
128 [-mfix-vr4120] [-mno-fix-vr4120]
129 [-mfix-vr4130] [-mno-fix-vr4130]
130 [-mdebug] [-no-mdebug]
131 [-mpdr] [-mno-pdr]
132 Target MMIX options:
134 [--fixed-special-register-names] [--globalize-symbols]
135 [--gnu-syntax] [--relax] [--no-predefined-symbols]
136 [--no-expand] [--no-merge-gregs] [-x]
137 [--linker-allocated-gregs]
138 Target PDP11 options:
140 [-mpic|-mno-pic] [-mall] [-mno-extensions]
141 [-mextension|-mno-extension]
142 [-mcpu] [-mmachine]
143 Target picoJava options:
145 [-mb|-me]
146 Target PowerPC options:
148 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
149 -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke]
150 [-mcom|-many|-maltivec|-mvsx] [-memb]
151 [-mregnames|-mno-regnames]
152 [-mrelocatable|-mrelocatable-lib]
153 [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
154 [-msolaris|-mno-solaris]
155 Target RX options:
157 [-mlittle-endian|-mbig-endian]
158 [-m32bit-ints|-m16bit-ints]
159 [-m32bit-doubles|-m64bit-doubles]
160 Target s390 options:
162 [-m31|-m64] [-mesa|-mzarch] [-march=CPU]
163 [-mregnames|-mno-regnames]
164 [-mwarn-areg-zero]
165 Target SCORE options:
167 [-EB][-EL][-FIXDD][-NWARN]
168 [-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
169 [-march=score7][-march=score3]
170 [-USE_R1][-KPIC][-O0][-G num][-V]
171 Target SPARC options:
173 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
174 -Av8plus|-Av8plusa|-Av9|-Av9a]
175 [-xarch=v8plus|-xarch=v8plusa] [-bump]
176 [-32|-64]
177 Target TIC54X options:
179 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
180 [-merrors-to-file <filename>|-me <filename>]
181 Target Z80 options:
183 [-z80] [-r800]
184 [ -ignore-undocumented-instructions] [-Wnud]
185 [ -ignore-unportable-instructions] [-Wnup]
186 [ -warn-undocumented-instructions] [-Wud]
187 [ -warn-unportable-instructions] [-Wup]
188 [ -forbid-undocumented-instructions] [-Fud]
189 [ -forbid-unportable-instructions] [-Fup]
190 Target Xtensa options:
192 [--[no-]text-section-literals] [--[no-]absolute-literals]
193 [--[no-]target-align] [--[no-]longcalls]
194 [--[no-]transform]
195 [--rename-section oldname=newname]
196
198 GNU as is really a family of assemblers. If you use (or have used) the
199 GNU assembler on one architecture, you should find a fairly similar
200 environment when you use it on another architecture. Each version has
201 much in common with the others, including object file formats, most
202 assembler directives (often called pseudo-ops) and assembler syntax.
203 as is primarily intended to assemble the output of the GNU C compiler
205 "gcc" for use by the linker "ld". Nevertheless, we've tried to make as
206 assemble correctly everything that other assemblers for the same
207 machine would assemble. Any exceptions are documented explicitly.
208 This doesn't mean as always uses the same syntax as another assembler
209 for the same architecture; for example, we know of several incompatible
210 versions of 680x0 assembly language syntax.
211 Each time you run as it assembles exactly one source program. The
213 source program is made up of one or more files. (The standard input is
214 also a file.)
215 You give as a command line that has zero or more input file names. The
217 input files are read (from left file name to right). A command line
218 argument (in any position) that has no special meaning is taken to be
219 an input file name.
220 If you give as no file names it attempts to read one input file from
222 the as standard input, which is normally your terminal. You may have
223 to type ctl-D to tell as there is no more program to assemble.
224 Use -- if you need to explicitly name the standard input file in your
226 command line.
227 If the source is empty, as produces a small, empty object file.
229 as may write warnings and error messages to the standard error file
231 (usually your terminal). This should not happen when a compiler runs
232 as automatically. Warnings report an assumption made so that as could
233 keep assembling a flawed program; errors report a grave problem that
234 stops the assembly.
235 If you are invoking as via the GNU C compiler, you can use the -Wa
237 option to pass arguments through to the assembler. The assembler
238 arguments must be separated from each other (and the -Wa) by commas.
239 For example:
240 gcc -c -g -O -Wa,-alh,-L file.c
242 This passes two options to the assembler: -alh (emit a listing to
244 standard output with high-level and assembly source) and -L (retain
245 local symbols in the symbol table).
246 Usually you do not need to use this -Wa mechanism, since many compiler
248 command-line options are automatically passed to the assembler by the
249 compiler. (You can call the GNU compiler driver with the -v option to
250 see precisely what options it passes to each compilation pass,
251 including the assembler.)
252
254 @file
255 Read command-line options from file. The options read are inserted
256 in place of the original @file option. If file does not exist, or
257 cannot be read, then the option will be treated literally, and not
258 removed.
259 Options in file are separated by whitespace. A whitespace
261 character may be included in an option by surrounding the entire
262 option in either single or double quotes. Any character (including
263 a backslash) may be included by prefixing the character to be
264 included with a backslash. The file may itself contain additional
265 @file options; any such options will be processed recursively.
266 -a[cdghlmns]
268 Turn on listings, in any of a variety of ways:
269 -ac omit false conditionals
271 -ad omit debugging directives
273 -ag include general information, like as version and options passed
275 -ah include high-level source
277 -al include assembly
279 -am include macro expansions
281 -an omit forms processing
283 -as include symbols
285 =file
287 set the name of the listing file
288 You may combine these options; for example, use -aln for assembly
290 listing without forms processing. The =file option, if used, must
291 be the last one. By itself, -a defaults to -ahls.
292 --alternate
294 Begin in alternate macro mode.
295 -D Ignored. This option is accepted for script compatibility with
297 calls to other assemblers.
298 --debug-prefix-map old=new
300 When assembling files in directory old, record debugging
301 information describing them as in new instead.
302 --defsym sym=value
304 Define the symbol sym to be value before assembling the input file.
305 value must be an integer constant. As in C, a leading 0x indicates
306 a hexadecimal value, and a leading 0 indicates an octal value. The
307 value of the symbol can be overridden inside a source file via the
308 use of a ".set" pseudo-op.
309 -f "fast"---skip whitespace and comment preprocessing (assume source
311 is compiler output).
312 -g
314 --gen-debug
315 Generate debugging information for each assembler source line using
316 whichever debug format is preferred by the target. This currently
317 means either STABS, ECOFF or DWARF2.
318 --gstabs
320 Generate stabs debugging information for each assembler line. This
321 may help debugging assembler code, if the debugger can handle it.
322 --gstabs+
324 Generate stabs debugging information for each assembler line, with
325 GNU extensions that probably only gdb can handle, and that could
326 make other debuggers crash or refuse to read your program. This
327 may help debugging assembler code. Currently the only GNU
328 extension is the location of the current working directory at
329 assembling time.
330 --gdwarf-2
332 Generate DWARF2 debugging information for each assembler line.
333 This may help debugging assembler code, if the debugger can handle
334 it. Note---this option is only supported by some targets, not all
335 of them.
336 --help
338 Print a summary of the command line options and exit.
339 --target-help
341 Print a summary of all target specific options and exit.
342 -I dir
344 Add directory dir to the search list for ".include" directives.
345 -J Don't warn about signed overflow.
347 -K Issue warnings when difference tables altered for long
349 displacements.
350 -L
352 --keep-locals
353 Keep (in the symbol table) local symbols. These symbols start with
354 system-specific local label prefixes, typically .L for ELF systems
355 or L for traditional a.out systems.
356 --listing-lhs-width=number
358 Set the maximum width, in words, of the output data column for an
359 assembler listing to number.
360 --listing-lhs-width2=number
362 Set the maximum width, in words, of the output data column for
363 continuation lines in an assembler listing to number.
364 --listing-rhs-width=number
366 Set the maximum width of an input source line, as displayed in a
367 listing, to number bytes.
368 --listing-cont-lines=number
370 Set the maximum number of lines printed in a listing for a single
371 line of input to number + 1.
372 -o objfile
374 Name the object-file output from as objfile.
375 -R Fold the data section into the text section.
377 Set the default size of GAS's hash tables to a prime number close
379 to number. Increasing this value can reduce the length of time it
380 takes the assembler to perform its tasks, at the expense of
381 increasing the assembler's memory requirements. Similarly reducing
382 this value can reduce the memory requirements at the expense of
383 speed.
384 --reduce-memory-overheads
386 This option reduces GAS's memory requirements, at the expense of
387 making the assembly processes slower. Currently this switch is a
388 synonym for --hash-size=4051, but in the future it may have other
389 effects as well.
390 --statistics
392 Print the maximum space (in bytes) and total time (in seconds) used
393 by assembly.
394 --strip-local-absolute
396 Remove local absolute symbols from the outgoing symbol table.
397 -v
399 -version
400 Print the as version.
401 --version
403 Print the as version and exit.
404 -W
406 --no-warn
407 Suppress warning messages.
408 --fatal-warnings
410 Treat warnings as errors.
411 --warn
413 Don't suppress warning messages or treat them as errors.
414 -w Ignored.
416 -x Ignored.
418 -Z Generate an object file even after errors.
420 -- | files ...
422 Standard input, or source files to assemble.
423 The following options are available when as is configured for an ARC
425 processor.
426 -marc[5|6|7|8]
428 This option selects the core processor variant.
429 -EB | -EL
431 Select either big-endian (-EB) or little-endian (-EL) output.
432 The following options are available when as is configured for the ARM
434 processor family.
435 -mcpu=processor[+extension...]
437 Specify which ARM processor variant is the target.
438 -march=architecture[+extension...]
440 Specify which ARM architecture variant is used by the target.
441 -mfpu=floating-point-format
443 Select which Floating Point architecture is the target.
444 -mfloat-abi=abi
446 Select which floating point ABI is in use.
447 -mthumb
449 Enable Thumb only instruction decoding.
450 -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant
452 Select which procedure calling convention is in use.
453 -EB | -EL
455 Select either big-endian (-EB) or little-endian (-EL) output.
456 -mthumb-interwork
458 Specify that the code has been generated with interworking between
459 Thumb and ARM code in mind.
460 -k Specify that PIC code has been generated.
462 The following options are available when as is configured for the
464 Blackfin processor family.
465 -mcpu=processor[-sirevision]
467 This option specifies the target processor. The optional
468 sirevision is not used in assembler.
469 -mfdpic
471 Assemble for the FDPIC ABI.
472 -mno-fdpic/-mnopic
474 Disable -mfdpic.
475 See the info pages for documentation of the CRIS-specific options.
477 The following options are available when as is configured for a D10V
479 processor.
480 -O Optimize output by parallelizing instructions.
482 The following options are available when as is configured for a D30V
484 processor.
485 -O Optimize output by parallelizing instructions.
487 -n Warn when nops are generated.
489 -N Warn when a nop after a 32-bit multiply instruction is generated.
491 The following options are available when as is configured for the Intel
493 80960 processor.
494 -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
496 Specify which variant of the 960 architecture is the target.
497 -b Add code to collect statistics about branches taken.
499 -no-relax
501 Do not alter compare-and-branch instructions for long
502 displacements; error if necessary.
503 The following options are available when as is configured for the
505 Ubicom IP2K series.
506 -mip2022ext
508 Specifies that the extended IP2022 instructions are allowed.
509 -mip2022
511 Restores the default behaviour, which restricts the permitted
512 instructions to just the basic IP2022 ones.
513 The following options are available when as is configured for the
515 Renesas M32C and M16C processors.
516 -m32c
518 Assemble M32C instructions.
519 -m16c
521 Assemble M16C instructions (the default).
522 -relax
524 Enable support for link-time relaxations.
525 -h-tick-hex
527 Support H'00 style hex constants in addition to 0x00 style.
528 The following options are available when as is configured for the
530 Renesas M32R (formerly Mitsubishi M32R) series.
531 --m32rx
533 Specify which processor in the M32R family is the target. The
534 default is normally the M32R, but this option changes it to the
535 M32RX.
536 --warn-explicit-parallel-conflicts or --Wp
538 Produce warning messages when questionable parallel constructs are
539 encountered.
540 --no-warn-explicit-parallel-conflicts or --Wnp
542 Do not produce warning messages when questionable parallel
543 constructs are encountered.
544 The following options are available when as is configured for the
546 Motorola 68000 series.
547 -l Shorten references to undefined symbols, to one word instead of
549 two.
550 -m68000 | -m68008 | -m68010 | -m68020 | -m68030
552 | -m68040 | -m68060 | -m68302 | -m68331 | -m68332
553 | -m68333 | -m68340 | -mcpu32 | -m5200
554 Specify what processor in the 68000 family is the target. The
555 default is normally the 68020, but this can be changed at
556 configuration time.
557 -m68881 | -m68882 | -mno-68881 | -mno-68882
559 The target machine does (or does not) have a floating-point
560 coprocessor. The default is to assume a coprocessor for 68020,
561 68030, and cpu32. Although the basic 68000 is not compatible with
562 the 68881, a combination of the two can be specified, since it's
563 possible to do emulation of the coprocessor instructions with the
564 main processor.
565 -m68851 | -mno-68851
567 The target machine does (or does not) have a memory-management unit
568 coprocessor. The default is to assume an MMU for 68020 and up.
569 For details about the PDP-11 machine dependent features options, see
571 PDP-11-Options.
572 -mpic | -mno-pic
574 Generate position-independent (or position-dependent) code. The
575 default is -mpic.
576 -mall
578 -mall-extensions
579 Enable all instruction set extensions. This is the default.
580 -mno-extensions
582 Disable all instruction set extensions.
583 -mextension | -mno-extension
585 Enable (or disable) a particular instruction set extension.
586 -mcpu
588 Enable the instruction set extensions supported by a particular
589 CPU, and disable all other extensions.
590 -mmachine
592 Enable the instruction set extensions supported by a particular
593 machine model, and disable all other extensions.
594 The following options are available when as is configured for a
596 picoJava processor.
597 -mb Generate "big endian" format output.
599 -ml Generate "little endian" format output.
601 The following options are available when as is configured for the
603 Motorola 68HC11 or 68HC12 series.
604 -m68hc11 | -m68hc12 | -m68hcs12
606 Specify what processor is the target. The default is defined by
607 the configuration option when building the assembler.
608 -mshort
610 Specify to use the 16-bit integer ABI.
611 -mlong
613 Specify to use the 32-bit integer ABI.
614 -mshort-double
616 Specify to use the 32-bit double ABI.
617 -mlong-double
619 Specify to use the 64-bit double ABI.
620 --force-long-branches
622 Relative branches are turned into absolute ones. This concerns
623 conditional branches, unconditional branches and branches to a sub
624 routine.
625 -S | --short-branches
627 Do not turn relative branches into absolute ones when the offset is
628 out of range.
629 --strict-direct-mode
631 Do not turn the direct addressing mode into extended addressing
632 mode when the instruction does not support direct addressing mode.
633 --print-insn-syntax
635 Print the syntax of instruction in case of error.
636 --print-opcodes
638 print the list of instructions with syntax and then exit.
639 --generate-example
641 print an example of instruction for each possible instruction and
642 then exit. This option is only useful for testing as.
643 The following options are available when as is configured for the SPARC
645 architecture:
646 -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
648 -Av8plus | -Av8plusa | -Av9 | -Av9a
649 Explicitly select a variant of the SPARC architecture.
650 -Av8plus and -Av8plusa select a 32 bit environment. -Av9 and -Av9a
652 select a 64 bit environment.
653 -Av8plusa and -Av9a enable the SPARC V9 instruction set with
655 UltraSPARC extensions.
656 -xarch=v8plus | -xarch=v8plusa
658 For compatibility with the Solaris v9 assembler. These options are
659 equivalent to -Av8plus and -Av8plusa, respectively.
660 -bump
662 Warn when the assembler switches to another architecture.
663 The following options are available when as is configured for the 'c54x
665 architecture.
666 -mfar-mode
668 Enable extended addressing mode. All addresses and relocations
669 will assume extended addressing (usually 23 bits).
670 -mcpu=CPU_VERSION
672 Sets the CPU version being compiled for.
673 -merrors-to-file FILENAME
675 Redirect error output to a file, for broken systems which don't
676 support such behaviour in the shell.
677 The following options are available when as is configured for a MIPS
679 processor.
680 -G num
682 This option sets the largest size of an object that can be
683 referenced implicitly with the "gp" register. It is only accepted
684 for targets that use ECOFF format, such as a DECstation running
685 Ultrix. The default value is 8.
686 -EB Generate "big endian" format output.
688 -EL Generate "little endian" format output.
690 -mips1
692 -mips2
693 -mips3
694 -mips4
695 -mips5
696 -mips32
697 -mips32r2
698 -mips64
699 -mips64r2
700 Generate code for a particular MIPS Instruction Set Architecture
701 level. -mips1 is an alias for -march=r3000, -mips2 is an alias for
702 -march=r6000, -mips3 is an alias for -march=r4000 and -mips4 is an
703 alias for -march=r8000. -mips5, -mips32, -mips32r2, -mips64, and
704 -mips64r2 correspond to generic MIPS V, MIPS32, MIPS32 Release 2,
705 MIPS64, and MIPS64 Release 2 ISA processors, respectively.
706 -march=CPU
708 Generate code for a particular MIPS cpu.
709 -mtune=cpu
711 Schedule and tune for a particular MIPS cpu.
712 -mfix7000
714 -mno-fix7000
715 Cause nops to be inserted if the read of the destination register
716 of an mfhi or mflo instruction occurs in the following two
717 instructions.
718 -mdebug
720 -no-mdebug
721 Cause stabs-style debugging output to go into an ECOFF-style
722 .mdebug section instead of the standard ELF .stabs sections.
723 -mpdr
725 -mno-pdr
726 Control generation of ".pdr" sections.
727 -mgp32
729 -mfp32
730 The register sizes are normally inferred from the ISA and ABI, but
731 these flags force a certain group of registers to be treated as 32
732 bits wide at all times. -mgp32 controls the size of general-
733 purpose registers and -mfp32 controls the size of floating-point
734 registers.
735 -mips16
737 -no-mips16
738 Generate code for the MIPS 16 processor. This is equivalent to
739 putting ".set mips16" at the start of the assembly file.
740 -no-mips16 turns off this option.
741 -msmartmips
743 -mno-smartmips
744 Enables the SmartMIPS extension to the MIPS32 instruction set. This
745 is equivalent to putting ".set smartmips" at the start of the
746 assembly file. -mno-smartmips turns off this option.
747 -mips3d
749 -no-mips3d
750 Generate code for the MIPS-3D Application Specific Extension. This
751 tells the assembler to accept MIPS-3D instructions. -no-mips3d
752 turns off this option.
753 -mdmx
755 -no-mdmx
756 Generate code for the MDMX Application Specific Extension. This
757 tells the assembler to accept MDMX instructions. -no-mdmx turns
758 off this option.
759 -mdsp
761 -mno-dsp
762 Generate code for the DSP Release 1 Application Specific Extension.
763 This tells the assembler to accept DSP Release 1 instructions.
764 -mno-dsp turns off this option.
765 -mdspr2
767 -mno-dspr2
768 Generate code for the DSP Release 2 Application Specific Extension.
769 This option implies -mdsp. This tells the assembler to accept DSP
770 Release 2 instructions. -mno-dspr2 turns off this option.
771 -mmt
773 -mno-mt
774 Generate code for the MT Application Specific Extension. This
775 tells the assembler to accept MT instructions. -mno-mt turns off
776 this option.
777 --construct-floats
779 --no-construct-floats
780 The --no-construct-floats option disables the construction of
781 double width floating point constants by loading the two halves of
782 the value into the two single width floating point registers that
783 make up the double width register. By default --construct-floats
784 is selected, allowing construction of these floating point
785 constants.
786 --emulation=name
788 This option causes as to emulate as configured for some other
789 target, in all respects, including output format (choosing between
790 ELF and ECOFF only), handling of pseudo-opcodes which may generate
791 debugging information or store symbol table information, and
792 default endianness. The available configuration names are:
793 mipsecoff, mipself, mipslecoff, mipsbecoff, mipslelf, mipsbelf.
794 The first two do not alter the default endianness from that of the
795 primary target for which the assembler was configured; the others
796 change the default to little- or big-endian as indicated by the b
797 or l in the name. Using -EB or -EL will override the endianness
798 selection in any case.
799 This option is currently supported only when the primary target as
801 is configured for is a MIPS ELF or ECOFF target. Furthermore, the
802 primary target or others specified with --enable-targets=... at
803 configuration time must include support for the other format, if
804 both are to be available. For example, the Irix 5 configuration
805 includes support for both.
806 Eventually, this option will support more configurations, with more
808 fine-grained control over the assembler's behavior, and will be
809 supported for more processors.
810 -nocpp
812 as ignores this option. It is accepted for compatibility with the
813 native tools.
814 --trap
816 --no-trap
817 --break
818 --no-break
819 Control how to deal with multiplication overflow and division by
820 zero. --trap or --no-break (which are synonyms) take a trap
821 exception (and only work for Instruction Set Architecture level 2
822 and higher); --break or --no-trap (also synonyms, and the default)
823 take a break exception.
824 -n When this option is used, as will issue a warning every time it
826 generates a nop instruction from a macro.
827 The following options are available when as is configured for an MCore
829 processor.
830 -jsri2bsr
832 -nojsri2bsr
833 Enable or disable the JSRI to BSR transformation. By default this
834 is enabled. The command line option -nojsri2bsr can be used to
835 disable it.
836 -sifilter
838 -nosifilter
839 Enable or disable the silicon filter behaviour. By default this is
840 disabled. The default can be overridden by the -sifilter command
841 line option.
842 -relax
844 Alter jump instructions for long displacements.
845 -mcpu=[210|340]
847 Select the cpu type on the target hardware. This controls which
848 instructions can be assembled.
849 -EB Assemble for a big endian target.
851 -EL Assemble for a little endian target.
853 See the info pages for documentation of the MMIX-specific options.
855 See the info pages for documentation of the RX-specific options.
857 The following options are available when as is configured for the s390
859 processor family.
860 -m31
862 -m64
863 Select the word size, either 31/32 bits or 64 bits.
864 -mesa
866 -mzarch
867 Select the architecture mode, either the Enterprise System
868 Architecture (esa) or the z/Architecture mode (zarch).
869 -march=processor
871 Specify which s390 processor variant is the target, g6, g6, z900,
872 z990, z9-109, z9-ec, or z10.
873 -mregnames
875 -mno-regnames
876 Allow or disallow symbolic names for registers.
877 -mwarn-areg-zero
879 Warn whenever the operand for a base or index register has been
880 specified but evaluates to zero.
881 The following options are available when as is configured for an Xtensa
883 processor.
884 --text-section-literals | --no-text-section-literals
886 With --text-section-literals, literal pools are interspersed in the
887 text section. The default is --no-text-section-literals, which
888 places literals in a separate section in the output file. These
889 options only affect literals referenced via PC-relative "L32R"
890 instructions; literals for absolute mode "L32R" instructions are
891 handled separately.
892 --absolute-literals | --no-absolute-literals
894 Indicate to the assembler whether "L32R" instructions use absolute
895 or PC-relative addressing. The default is to assume absolute
896 addressing if the Xtensa processor includes the absolute "L32R"
897 addressing option. Otherwise, only the PC-relative "L32R" mode can
898 be used.
899 --target-align | --no-target-align
901 Enable or disable automatic alignment to reduce branch penalties at
902 the expense of some code density. The default is --target-align.
903 --longcalls | --no-longcalls
905 Enable or disable transformation of call instructions to allow
906 calls across a greater range of addresses. The default is
907 --no-longcalls.
908 --transform | --no-transform
910 Enable or disable all assembler transformations of Xtensa
911 instructions. The default is --transform; --no-transform should be
912 used only in the rare cases when the instructions must be exactly
913 as specified in the assembly source.
914 --rename-section oldname=newname
916 When generating output sections, rename the oldname section to
917 newname.
918 The following options are available when as is configured for a Z80
920 family processor.
921 -z80
923 Assemble for Z80 processor.
924 -r800
926 Assemble for R800 processor.
927 -ignore-undocumented-instructions
929 -Wnud
930 Assemble undocumented Z80 instructions that also work on R800
931 without warning.
932 -ignore-unportable-instructions
934 -Wnup
935 Assemble all undocumented Z80 instructions without warning.
936 -warn-undocumented-instructions
938 -Wud
939 Issue a warning for undocumented Z80 instructions that also work on
940 R800.
941 -warn-unportable-instructions
943 -Wup
944 Issue a warning for undocumented Z80 instructions that do not work
945 on R800.
946 -forbid-undocumented-instructions
948 -Fud
949 Treat all undocumented instructions as errors.
950 -forbid-unportable-instructions
952 -Fup
953 Treat undocumented Z80 instructions that do not work on R800 as
954 errors.
955
957 gcc(1), ld(1), and the Info entries for binutils and ld.
958
960 Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
961 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
962 Permission is granted to copy, distribute and/or modify this document
964 under the terms of the GNU Free Documentation License, Version 1.3 or
965 any later version published by the Free Software Foundation; with no
966 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
967 Texts. A copy of the license is included in the section entitled "GNU
968 Free Documentation License".
969binutils-2.20.51.0.7 2011-05-02 AS(1)